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[98.61.227.136]) by smtp.gmail.com with ESMTPSA id c5-20020a92cf05000000b0036426373792sm1759365ilo.87.2024.02.18.11.07.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Feb 2024 11:07:30 -0800 (PST) Message-ID: <5e36928d-e892-4cfe-85a5-c0cdbc669c0e@linaro.org> Date: Sun, 18 Feb 2024 13:07:29 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] net: ipa: don't overrun IPA suspend interrupt registers Content-Language: en-US From: Alex Elder To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: mka@chromium.org, andersson@kernel.org, quic_cpratapa@quicinc.com, quic_avuyyuru@quicinc.com, quic_jponduru@quicinc.com, quic_subashab@quicinc.com, elder@kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240218190450.331390-1-elder@linaro.org> In-Reply-To: <20240218190450.331390-1-elder@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 2/18/24 1:04 PM, Alex Elder wrote: > In newer hardware, IPA supports more than 32 endpoints. Some > registers--such as IPA interrupt registers--represent endpoints > as bits in a 4-byte register, and such registers are repeated as > needed to represent endpoints beyond the first 32. I'm sorry, this is a BUG FIX and I neglected to include "net" in the subject. Please handle this accordingly... -Alex > > In ipa_interrupt_suspend_clear_all(), we clear all pending IPA > suspend interrupts by reading all status register(s) and writing > corresponding registers to clear interrupt conditions. > > Unfortunately the number of registers to read/write is calculated > incorrectly, and as a result we access *many* more registers than > intended. This bug occurs only when the IPA hardware signals a > SUSPEND interrupt, which happens when a packet is received for an > endpoint (or its underlying GSI channel) that is suspended. This > situation is difficult to reproduce, but possible. > > Fix this by correctly computing the number of interrupt registers to > read and write. This is the only place in the code where registers > that map endpoints or channels this way perform this calculation. > > Fixes: f298ba785e2d ("net: ipa: add a parameter to suspend registers") > Signed-off-by: Alex Elder > --- > drivers/net/ipa/ipa_interrupt.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/net/ipa/ipa_interrupt.c b/drivers/net/ipa/ipa_interrupt.c > index 4bc05948f772d..a78c692f2d3c5 100644 > --- a/drivers/net/ipa/ipa_interrupt.c > +++ b/drivers/net/ipa/ipa_interrupt.c > @@ -212,7 +212,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) > u32 unit_count; > u32 unit; > > - unit_count = roundup(ipa->endpoint_count, 32); > + unit_count = DIV_ROUND_UP(ipa->endpoint_count, 32); > for (unit = 0; unit < unit_count; unit++) { > const struct reg *reg; > u32 val;