From: Yi Liu <yi.l.liu@intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>,
Joerg Roedel <joro@8bytes.org>, "Will Deacon" <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
Kevin Tian <kevin.tian@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>, Vinod Koul <vkoul@kernel.org>,
"Fenghua Yu" <fenghuay@nvidia.com>,
Zhangfei Gao <zhangfei.gao@linaro.org>,
Zhou Wang <wangzhou1@hisilicon.com>, <iommu@lists.linux.dev>,
<linux-kernel@vger.kernel.org>, Jason Gunthorpe <jgg@nvidia.com>
Subject: Re: [PATCH v4 5/8] dmaengine: idxd: Remove unnecessary IOMMU_DEV_FEAT_IOPF
Date: Tue, 18 Mar 2025 18:20:04 +0800 [thread overview]
Message-ID: <5ea99aee-0b94-4373-9c17-5d1bb6662f9b@intel.com> (raw)
In-Reply-To: <20250313051953.4064532-6-baolu.lu@linux.intel.com>
On 2025/3/13 13:19, Lu Baolu wrote:
> The IOMMU_DEV_FEAT_IOPF implementation in the iommu driver is just a no-op.
> It will also be removed from the iommu driver in the subsequent patch.
> Remove it to avoid dead code.
>
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> Acked-by: Vinod Koul <vkoul@kernel.org>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
> Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
> ---
> drivers/dma/idxd/init.c | 37 ++++++-------------------------------
> 1 file changed, 6 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c
> index 1e5038cca22c..d44944195807 100644
> --- a/drivers/dma/idxd/init.c
> +++ b/drivers/dma/idxd/init.c
> @@ -626,21 +626,6 @@ static void idxd_disable_system_pasid(struct idxd_device *idxd)
> idxd->pasid = IOMMU_PASID_INVALID;
> }
>
> -static int idxd_enable_sva(struct pci_dev *pdev)
> -{
> - int ret;
> -
> - ret = iommu_dev_enable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF);
> - if (ret)
> - return ret;
> - return 0;
> -}
> -
> -static void idxd_disable_sva(struct pci_dev *pdev)
> -{
> - iommu_dev_disable_feature(&pdev->dev, IOMMU_DEV_FEAT_IOPF);
> -}
> -
> static int idxd_probe(struct idxd_device *idxd)
> {
> struct pci_dev *pdev = idxd->pdev;
> @@ -655,17 +640,13 @@ static int idxd_probe(struct idxd_device *idxd)
> dev_dbg(dev, "IDXD reset complete\n");
>
> if (IS_ENABLED(CONFIG_INTEL_IDXD_SVM) && sva) {
> - if (idxd_enable_sva(pdev)) {
> - dev_warn(dev, "Unable to turn on user SVA feature.\n");
> - } else {
> - set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags);
> + set_bit(IDXD_FLAG_USER_PASID_ENABLED, &idxd->flags);
a nit. The IDXD_FLAG_USER_PASID_ENABLED becomes almost equivalent to the
sva option. Is it ok?
This patch itself LGTM.
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
--
Regards,
Yi Liu
next prev parent reply other threads:[~2025-03-18 10:14 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-13 5:19 [PATCH v4 0/8] iommu: Remove IOMMU_DEV_FEAT_SVA/_IOPF Lu Baolu
2025-03-13 5:19 ` [PATCH v4 1/8] iommu/arm-smmu-v3: Put iopf enablement in the domain attach path Lu Baolu
2025-03-13 5:19 ` [PATCH v4 2/8] iommu: Remove IOMMU_DEV_FEAT_SVA Lu Baolu
2025-03-13 5:19 ` [PATCH v4 3/8] iommu/vt-d: Put iopf enablement in domain attach path Lu Baolu
2025-03-18 9:58 ` Yi Liu
2025-03-18 13:19 ` Baolu Lu
2025-03-13 5:19 ` [PATCH v4 4/8] iommufd/selftest: " Lu Baolu
2025-03-18 10:25 ` Yi Liu
2025-03-18 19:50 ` Nicolin Chen
2025-03-13 5:19 ` [PATCH v4 5/8] dmaengine: idxd: Remove unnecessary IOMMU_DEV_FEAT_IOPF Lu Baolu
2025-03-18 10:20 ` Yi Liu [this message]
2025-03-13 5:19 ` [PATCH v4 6/8] uacce: " Lu Baolu
2025-03-13 5:19 ` [PATCH v4 7/8] iommufd: " Lu Baolu
2025-03-13 5:19 ` [PATCH v4 8/8] iommu: Remove iommu_dev_enable/disable_feature() Lu Baolu
2025-03-13 9:51 ` [PATCH v4 0/8] iommu: Remove IOMMU_DEV_FEAT_SVA/_IOPF Zhangfei Gao
2025-03-13 10:57 ` Zhangfei Gao
2025-03-13 11:20 ` Baolu Lu
2025-03-13 11:37 ` Zhangfei Gao
2025-03-14 4:04 ` Zhangfei Gao
2025-03-14 8:11 ` Zhangfei Gao
2025-03-17 14:15 ` Jason Gunthorpe
2025-04-16 7:29 ` Zhangfei Gao
2025-04-16 7:33 ` Baolu Lu
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