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Wysocki" , Brian Gerst , Patryk Wlazlyn , Swapnil Sapkal , "Yury Norov [NVIDIA]" , Sudeep Holla , Jonathan Cameron , Yicong Yang , Ricardo Neri , Tim Chen , Vinicius Costa Gomes , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Heiko Carstens , Vasily Gorbik , Alexander Gordeev , Christian Borntraeger , Sven Schnelle , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juri Lelli , Vincent Guittot , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org, Peter Zijlstra References: <20250826041319.1284-1-kprateek.nayak@amd.com> <20250826041319.1284-5-kprateek.nayak@amd.com> Content-Language: en-US From: Shrikanth Hegde In-Reply-To: <20250826041319.1284-5-kprateek.nayak@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: -2--Cp9qI1VVivKGyFqxE41rZ7zdojJh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAyMSBTYWx0ZWRfXxjL/DSgAnx2D zxziEiBmpLPb7T373sPDIP5FphKINAVdX6nVXXoRC7zeod0LNE53DAQ+yyL0I+8WLvU7kd3n6rp C18zs+ZnzyV/v6/bNOEY2yd6mWPvEys6pfNGeOAgqXNmtqAcZFSuSjFKyTvmxtEhWvwVPtlnKx7 dPw+P2/4fZTaD0VKlQqGfhdFHWt2sIOMPbR3RPae+IyEUtF57BoBo11fl6ezMIOmniti8Bo0wFa VmfngxIWnk5NbiO45DBbAXujxvjC3Nkd+/RzFiqOs3aAIuXbw7Mf2Ddp+DONQ9ux+9ycLNDbtRN EkmOw7cjGB2kCMSsPLD/5rYyQiMstj2vRxjjhNz3+v7R5zgT8Np6BXAmpn+lv+3zPzDTfmGdXhh IY3l+zSe X-Proofpoint-ORIG-GUID: lHjetDSyZoG3vF1_c2MO9HTQV_cMoToA X-Authority-Analysis: v=2.4 cv=SNNCVPvH c=1 sm=1 tr=0 ts=68ad7e15 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=zd2uoN0lAAAA:8 a=v6YubWqPPbTyhgY4940A:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-26_02,2025-08-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 bulkscore=0 phishscore=0 clxscore=1011 impostorscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230021 On 8/26/25 9:43 AM, K Prateek Nayak wrote: > PowerPC enables the MC scheduling domain by default on systems with > coregroup support without having a SCHED_MC config in Kconfig. > > The scheduler uses CONFIG_SCHED_MC to introduce the MC domain in the > default topology (core) and to optimize the default CPU selection > routine (sched-ext). Curious to know if sched_ext usage. i see below code. if (static_branch_maybe(CONFIG_SCHED_MC, &scx_selcpu_topo_llc)) scx_selcpu_topo_llc = true if there is sd_llc. One can have llc domain without MC domain. I am wondering whats the reason behind the clubbing. > > Introduce CONFIG_SCHED_MC for powerpc and note that it should be > preferably enabled given the current default behavior. This also ensures > PowerPC is tested during future developments that come to depend on > CONFIG_SCHED_MC. > > Signed-off-by: K Prateek Nayak > --- > arch/powerpc/Kconfig | 9 +++++++++ > arch/powerpc/include/asm/smp.h | 2 ++ > arch/powerpc/kernel/smp.c | 4 ++++ > 3 files changed, 15 insertions(+) > > diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig > index 93402a1d9c9f..e954ab3f635f 100644 > --- a/arch/powerpc/Kconfig > +++ b/arch/powerpc/Kconfig > @@ -971,6 +971,15 @@ config SCHED_SMT > when dealing with POWER5 cpus at a cost of slightly increased > overhead in some places. If unsure say N here. > > +config SCHED_MC > + bool "Multi-Core Cache (MC) scheduler support" > + depends on PPC64 && SMP > + default y > + help > + MC scheduler support improves the CPU scheduler's decision making > + when dealing with POWER systems that contain multiple Last Level > + Cache instances on the same socket. If unsure say Y here. > + > config PPC_DENORMALISATION > bool "PowerPC denormalisation exception handling" > depends on PPC_BOOK3S_64 > diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h > index 86de4d0dd0aa..9a320d96e891 100644 > --- a/arch/powerpc/include/asm/smp.h > +++ b/arch/powerpc/include/asm/smp.h > @@ -148,7 +148,9 @@ static inline const struct cpumask *cpu_smt_mask(int cpu) > } > #endif /* CONFIG_SCHED_SMT */ > > +#ifdef CONFIG_SCHED_MC > extern const struct cpumask *cpu_coregroup_mask(int cpu); > +#endif > Is ifdef necessary here? > /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. > * > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c > index e623f2864dc4..7f79b853b221 100644 > --- a/arch/powerpc/kernel/smp.c > +++ b/arch/powerpc/kernel/smp.c > @@ -1059,6 +1059,7 @@ static bool has_coregroup_support(void) > return coregroup_enabled; > } > > +#ifdef CONFIG_SCHED_MC > const struct cpumask *cpu_coregroup_mask(int cpu) > { > if (has_coregroup_support()) > @@ -1071,6 +1072,7 @@ static const struct cpumask *cpu_mc_mask(struct sched_domain_topology_level *tl, > { > return cpu_corgrp_mask(cpu); > } > +#endif > Previous patch says cpu_coregroup_mask is exported. Is it exported in any way to user or modules? Also i don't see similar gating in other archs. It maybe unnecessary. > static const struct cpumask *cpu_pkg_mask(struct sched_domain_topology_level *tl, int cpu) > { > @@ -1729,10 +1731,12 @@ static void __init build_sched_topology(void) > SDTL_INIT(shared_cache_mask, powerpc_shared_cache_flags, CACHE); > } > > +#ifdef CONFIG_SCHED_MC > if (has_coregroup_support()) { > powerpc_topology[i++] = > SDTL_INIT(cpu_mc_mask, powerpc_shared_proc_flags, MC); > } > +#endif Just this gating should suffice IMO.> > powerpc_topology[i++] = SDTL_INIT(cpu_pkg_mask, powerpc_shared_proc_flags, PKG); >