From: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konradybcio@kernel.org>,
"Andi Shyti" <andi.shyti@kernel.org>,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Christian König" <christian.koenig@amd.com>,
cros-qcom-dts-watchers@chromium.org,
linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-i2c@vger.kernel.org, linux-media@vger.kernel.org,
dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org,
quic_msavaliy@quicinc.com, quic_vtanuku@quicinc.com
Subject: Re: [PATCH v1 1/5] dt-bindings: dmaengine: qcom: gpi: Add additional arg to dma-cell property
Date: Fri, 25 Oct 2024 23:55:51 +0530 [thread overview]
Message-ID: <5f36903a-e21f-4f5b-bc59-ab2bd7cbfb30@quicinc.com> (raw)
In-Reply-To: <Zw9HHRyvfd66Qn4a@vaman>
On 10/16/2024 10:24 AM, Vinod Koul wrote:
> On 15-10-24, 17:37, Jyothi Kumar Seerapu wrote:
>> When high performance with multiple i2c messages in a single transfer
>> is required, employ Block Event Interrupt (BEI) to trigger interrupts
>> after specific messages transfer and the last message transfer,
>> thereby reducing interrupts.
>>
>> For each i2c message transfer, a series of Transfer Request Elements(TREs)
>> must be programmed, including config tre for frequency configuration,
>> go tre for holding i2c address and dma tre for holding dma buffer address,
>> length as per the hardware programming guide. For transfer using BEI,
>> multiple I2C messages may necessitate the preparation of config, go,
>> and tx DMA TREs. However, a channel TRE size of 64 is often insufficient,
>> potentially leading to failures due to inadequate memory space.
>>
>> Add additional argument to dma-cell property for channel TRE size.
>> With this, adjust the channel TRE size via the device tree.
>> The default size is 64, but clients can modify this value based on
>> their specific requirements.
>>
>> Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
>> ---
>> Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
>> index 4df4e61895d2..002495921643 100644
>> --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
>> +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml
>> @@ -54,14 +54,16 @@ properties:
>> maxItems: 13
>>
>> "#dma-cells":
>> - const: 3
>> + minItems: 3
>> + maxItems: 4
>> description: >
>> DMA clients must use the format described in dma.txt, giving a phandle
>> - to the DMA controller plus the following 3 integer cells:
>> + to the DMA controller plus the following 4 integer cells:
>> - channel: if set to 0xffffffff, any available channel will be allocated
>> for the client. Otherwise, the exact channel specified will be used.
>> - seid: serial id of the client as defined in the SoC documentation.
>> - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
>> + - channel-tre-size: size of the channel TRE (transfer ring element)
> This is a firmware /software property, why should this be in hardware
> description?
This is a software property and here trying to add channel tre size as a
4th argument of dma-cells property.
In V2, i have reverted the DT and binding changes related to adding new
argument for dma-cells property and used GPI driver defined value.
Regards,
JyothiKumar
>
next prev parent reply other threads:[~2024-10-25 18:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-15 12:07 [PATCH v1 0/5] Add Block event interrupt support for I2C protocol Jyothi Kumar Seerapu
2024-10-15 12:07 ` [PATCH v1 1/5] dt-bindings: dmaengine: qcom: gpi: Add additional arg to dma-cell property Jyothi Kumar Seerapu
2024-10-15 13:26 ` Rob Herring (Arm)
2024-10-28 5:57 ` Jyothi Kumar Seerapu
2024-10-15 13:31 ` Krzysztof Kozlowski
2024-10-25 18:11 ` Jyothi Kumar Seerapu
2024-10-15 14:01 ` Rob Herring
2024-10-28 5:38 ` Jyothi Kumar Seerapu
2024-10-16 4:54 ` Vinod Koul
2024-10-25 18:25 ` Jyothi Kumar Seerapu [this message]
2024-10-28 5:50 ` Jyothi Kumar Seerapu
2024-10-15 12:07 ` [PATCH v1 2/5] arm64: dts: qcom: Add support for configuring channel TRE size Jyothi Kumar Seerapu
2024-10-15 13:33 ` Krzysztof Kozlowski
2024-10-16 14:35 ` Bjorn Andersson
2024-10-17 7:10 ` Krzysztof Kozlowski
2024-10-28 5:34 ` Jyothi Kumar Seerapu
2024-10-15 12:07 ` [PATCH v1 3/5] dmaengine: qcom: gpi: Add provision to support TRE size as the fourth argument of dma-cells property Jyothi Kumar Seerapu
2024-10-25 18:17 ` Konrad Dybcio
2024-10-28 6:32 ` Jyothi Kumar Seerapu
2024-10-15 12:07 ` [PATCH v1 4/5] dmaengine: qcom: gpi: Add GPI Block event interrupt support Jyothi Kumar Seerapu
2024-10-15 12:07 ` [PATCH v1 5/5] i2c: i2c-qcom-geni: Add " Jyothi Kumar Seerapu
2024-10-16 15:06 ` Andi Shyti
2024-10-28 6:04 ` Jyothi Kumar Seerapu
2024-10-18 22:11 ` kernel test robot
2024-10-28 6:07 ` Jyothi Kumar Seerapu
2024-10-19 3:12 ` kernel test robot
2024-10-28 6:06 ` Jyothi Kumar Seerapu
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