From: Jayesh Choudhary <j-choudhary@ti.com>
To: Nishanth Menon <nm@ti.com>, <s-vadapalli@ti.com>, <afd@ti.com>
Cc: <vigneshr@ti.com>, <krzysztof.kozlowski+dt@linaro.org>,
<kristo@kernel.org>, <robh+dt@kernel.org>, <conor+dt@kernel.org>,
<rogerq@kernel.org>, <a-bhatia1@ti.com>, <r-ravikumar@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux
Date: Thu, 27 Jul 2023 15:48:48 +0530 [thread overview]
Message-ID: <5f5269dd-3cff-6fff-909d-355c190001d2@ti.com> (raw)
In-Reply-To: <20230724165220.kbjo7t5vthurqeuj@spokesman>
On 24/07/23 22:22, Nishanth Menon wrote:
> On 18:50-20230721, Jayesh Choudhary wrote:
>> From: Siddharth Vadapalli <s-vadapalli@ti.com>
>>
>> The system controller node manages the CTRL_MMR0 region.
>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
>>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> [j-choudhary@ti.com: Fix serdes_ln_ctrl node]
>> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 40 ++++++++++++++++++++++
>> 1 file changed, 40 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index 11f163e5cadf..5a4da4eb8d3d 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -5,6 +5,10 @@
>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>> */
>>
>> +#include <dt-bindings/mux/mux.h>
>> +
>> +#include "k3-serdes.h"
>> +
>> &cbass_main {
>> msmc_ram: sram@70000000 {
>> compatible = "mmio-sram";
>> @@ -26,6 +30,42 @@ l3cache-sram@200000 {
>> };
>> };
>>
>> + scm_conf: syscon@100000 {
>> + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
>
> Would'nt a simple-bus work?
> https://lore.kernel.org/all/20230605205220.rjmcsi5tjn4auqa7@arose/
For serdes_ln_ctrl it will be okay but for phy_gmii_sel,
we have dependency on [1].
So I will drop main_cpsw node (patch 2/5) and then re-spin it with
"simple-bus" compatible.
CPSW node can be taken up later on when the driver changes are in.
[1]:
https://lore.kernel.org/all/b16568ec-0428-981b-01ca-571cc5d52704@ti.com/
Warm Regards,
Jayesh
next prev parent reply other threads:[~2023-07-27 10:19 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-21 13:20 [PATCH v6 0/5] Add peripherals for J784S4 Jayesh Choudhary
2023-07-21 13:20 ` [PATCH v6 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux Jayesh Choudhary
2023-07-24 16:52 ` Nishanth Menon
2023-07-27 10:18 ` Jayesh Choudhary [this message]
2023-07-21 13:20 ` [PATCH v6 2/5] arm64: dts: ti: k3-j784s4: Add Main CPSW2G node Jayesh Choudhary
2023-07-24 4:50 ` Tony Lindgren
2023-07-28 4:57 ` Jayesh Choudhary
2023-07-21 13:20 ` [PATCH v6 3/5] arm64: dts: ti: k3-j784s4: Add WIZ and SERDES PHY nodes Jayesh Choudhary
2023-07-21 13:20 ` [PATCH v6 4/5] arm64: dts: ti: k3-j784s4-main: Add DSS and DP-bridge node Jayesh Choudhary
2023-07-21 13:20 ` [PATCH v6 5/5] arm64: dts: ti: k3-j784s4-evm: Enable DisplayPort-0 Jayesh Choudhary
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