From: Dave Hansen <dave.hansen@intel.com>
To: Jan Kiszka <jan.kiszka@siemens.com>, x86 <x86@kernel.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: x2apic_wrmsr_fence vs. Intel manual
Date: Wed, 4 Mar 2020 10:27:08 -0800 [thread overview]
Message-ID: <602968e1-c1e4-0980-effa-e9c40b82c8c8@intel.com> (raw)
In-Reply-To: <783add60-f6c7-c8c6-b369-42e5ebfbf8c9@siemens.com>
On 3/2/20 8:11 AM, Jan Kiszka wrote:
> The former dates back to ce4e240c279a, but that commit does not mention
> why lfence is not needed. Did the manual read differently back then? Or
> why are we safe? To my reading of lfence, it also has a certain
> instruction serializing effect that mfence does not have.
I asked around Intel about this.
The old "SFENCE, or MFENCE" recommendation was deemed insufficient
because it has no impact on the ordering of WRMSR since it is not a
"load or store instruction". LFENCE's instruction-ordering semantic is
needed because it ensures later ordering of all instructions, not just
loads and stores.
Jan, do you think you're seeing a bug resulting from WRMSR ordering?
next prev parent reply other threads:[~2020-03-04 18:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 16:11 x2apic_wrmsr_fence vs. Intel manual Jan Kiszka
2020-03-02 16:20 ` Thomas Gleixner
2020-03-02 16:33 ` Jan Kiszka
2020-03-02 16:35 ` Peter Zijlstra
2020-03-04 18:27 ` Dave Hansen [this message]
2020-03-04 18:39 ` Jan Kiszka
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