[PATCH v2 15/15] coresight: Make ETM4x TRCRSCTLRn register accesses consistent with sysreg.h

James Clark
2022-02-03T12:07:05Z

drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 7 +++++--
drivers/hwtracing/coresight/coresight-etm4x.h | 9 +++++++++
2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index a0cdd2cd978a..c876a63fa84d 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -1728,8 +1728,11 @@ static ssize_t res_ctrl_store(struct device *dev,
/* For odd idx pair inversal bit is RES0 */
if (idx % 2 != 0)
/* PAIRINV, bit[21] */
- val &= ~BIT(21);
- config->res_ctrl[idx] = val & GENMASK(21, 0);
+ val &= ~TRCRSCTLRn_PAIRINV;
+ config->res_ctrl[idx] = val & (TRCRSCTLRn_PAIRINV |
+ TRCRSCTLRn_INV |
+ (TRCRSCTLRn_GROUP_MASK << TRCRSCTLRn_GROUP_SHIFT) |
+ (TRCRSCTLRn_SELECT_MASK << TRCRSCTLRn_SELECT_SHIFT));
spin_unlock(&drvdata->spinlock);
return size;
}
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
index 4d943faade33..dd2156a5e70b 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.h
+++ b/drivers/hwtracing/coresight/coresight-etm4x.h
@@ -258,6 +258,15 @@
#define TRCBBCTLR_RANGE_SHIFT 0
#define TRCBBCTLR_RANGE_MASK GENMASK(7, 0)

+#define TRCRSCTLRn_PAIRINV BIT(21)
+#define TRCRSCTLRn_INV BIT(20)
+#define TRCRSCTLRn_GROUP_SHIFT 16
+#define TRCRSCTLRn_GROUP_MASK GENMASK(3, 0)
+#define TRCRSCTLRn_SELECT_SHIFT 0
+#define TRCRSCTLRn_SELECT_MASK GENMASK(15, 0)
+
+
+