From: Dave Jiang <dave.jiang@intel.com>
To: shiju.jose@huawei.com, dan.j.williams@intel.com,
jonathan.cameron@huawei.com, alison.schofield@intel.com,
nifan.cxl@gmail.com, vishal.l.verma@intel.com,
ira.weiny@intel.com, dave@stgolabs.net,
linux-cxl@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, linuxarm@huawei.com,
tanxiaofei@huawei.com, prime.zeng@hisilicon.com
Subject: Re: [PATCH v6 0/6] Update Event Records to CXL spec rev 3.1
Date: Mon, 13 Jan 2025 09:55:12 -0700 [thread overview]
Message-ID: <6238f100-16c4-42d1-8dc6-320e116a7b55@intel.com> (raw)
In-Reply-To: <20250111091756.1682-1-shiju.jose@huawei.com>
On 1/11/25 2:17 AM, shiju.jose@huawei.com wrote:
> From: Shiju Jose <shiju.jose@huawei.com>
>
> Add updates in the CXL events records and CXL trace events implementations
> for the changes in CXL spec rev 3.1.
>
> Shiju Jose (6):
> cxl/events: Update Common Event Record to CXL spec rev 3.1
> cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
> cxl/events: Update General Media Event Record to CXL spec rev 3.1
> cxl/events: Update DRAM Event Record to CXL spec rev 3.1
> cxl/events: Update Memory Module Event Record to CXL spec rev 3.1
> cxl/test: Update test code for event records to CXL spec rev 3.1
>
> Changes:
> V5 -> V6
> 1. Modified for feedbacks from Ira Weiny.
> - Reordered new fields added in trace events cxl_general_media,
> cxl_dram and (cxl_memory_module to pack the records.
> - Added a suggested note in the patch description of patch
> cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
>
> V4 -> V5
> 1. Reverted changes made in v4 for overcoming parsing error when
> libtraceevent in userspace parses the CXL trace events, for rasdaemon.
> This was due to trace event's format file is larger than PAGE_SIZE, not
> supported reading complete format file in one go in the kernel and thus
> fixed in the rasdaemon.
> 2. Rebased to v6.13-rc5, in which cxl.git/next is based.
> 3. Tested with rasdaemon and ras-mc-ctl tools updated for CXL spec rev 3.1
> event record changes.
>
> V3 -> V4
> 1. Changes for the parsing error parsing error when libtraceevent in
> userspace parses the CXL trace events, for rasdaemon.
> It was found that long decoded strings of field values in the TP_printk()
> caused the issue, looks like due to buffer overflow/corruption.
> Increasing known buffer sizes in userspace and kernel did not help.
> As a solution, decoding of some fields in the TP_printk() are removed
> to accommodate the new fields.
> Decoding of these fields is added in the userspace tool rasdaemon.
>
> V2 -> V3
> 1. Changes for the feedbacks from Jonathan.
> - Added printing component Id format bit in show_valid_flags()
> - Modified parsing component ID in patch [2] and added logging
> of raw comp-id, comp_id_pldm_flags, PLDM entity id and
> PLDM resource id in patches 3 to 4.
>
> V1 -> V2
> 1. Changes for the feedbacks from Jonathan.
> - Separate patch for Component Identifier formatting.
> - Moved printing of event sub type after event type.
> - For memory module event, rename sub_type to event_sub_type.
> 2. Changes for the feedbacks from Alison.
> - Updated patch's subject
> - Updated CXL test code for CXL spec rev 3.1 event records.
> 3. Changed logic for Component Identifier formatting and other improvements.
>
> drivers/cxl/core/trace.h | 259 +++++++++++++++++++++++++++++------
> include/cxl/event.h | 28 ++--
> tools/testing/cxl/test/mem.c | 23 +++-
> 3 files changed, 257 insertions(+), 53 deletions(-)
>
Applied to next
prev parent reply other threads:[~2025-01-13 16:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-11 9:17 [PATCH v6 0/6] Update Event Records to CXL spec rev 3.1 shiju.jose
2025-01-11 9:17 ` [PATCH v6 1/6] cxl/events: Update Common Event Record " shiju.jose
2025-01-11 9:17 ` [PATCH v6 2/6] cxl/events: Add Component Identifier formatting for " shiju.jose
2025-01-11 9:17 ` [PATCH v6 3/6] cxl/events: Update General Media Event Record to " shiju.jose
2025-01-11 9:17 ` [PATCH v6 4/6] cxl/events: Update DRAM " shiju.jose
2025-01-13 16:22 ` Ira Weiny
2025-01-11 9:17 ` [PATCH v6 5/6] cxl/events: Update Memory Module " shiju.jose
2025-01-11 9:17 ` [PATCH v6 6/6] cxl/test: Update test code for event records " shiju.jose
2025-01-13 16:55 ` Dave Jiang [this message]
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