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([2601:188:ca00:a00:f844:fad5:7984:7bd7]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6dd18137218sm190461776d6.57.2025.01.08.08.56.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 08 Jan 2025 08:56:01 -0800 (PST) From: Waiman Long X-Google-Original-From: Waiman Long Message-ID: <62c08854-04cb-4e45-a9e1-e6200cb787fd@redhat.com> Date: Wed, 8 Jan 2025 11:55:59 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH bpf-next v1 14/22] rqspinlock: Add macros for rqspinlock usage To: Kumar Kartikeya Dwivedi , bpf@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linus Torvalds , Peter Zijlstra , Waiman Long , Alexei Starovoitov , Andrii Nakryiko , Daniel Borkmann , Martin KaFai Lau , Eduard Zingerman , "Paul E. McKenney" , Tejun Heo , Barret Rhoden , Josh Don , Dohyun Kim , kernel-team@meta.com References: <20250107140004.2732830-1-memxor@gmail.com> <20250107140004.2732830-15-memxor@gmail.com> Content-Language: en-US In-Reply-To: <20250107140004.2732830-15-memxor@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/7/25 8:59 AM, Kumar Kartikeya Dwivedi wrote: > Introduce helper macros that wrap around the rqspinlock slow path and > provide an interface analogous to the raw_spin_lock API. Note that > in case of error conditions, preemption and IRQ disabling is > automatically unrolled before returning the error back to the caller. > > Signed-off-by: Kumar Kartikeya Dwivedi > --- > include/asm-generic/rqspinlock.h | 58 ++++++++++++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > > diff --git a/include/asm-generic/rqspinlock.h b/include/asm-generic/rqspinlock.h > index dc436ab01471..53be8426373c 100644 > --- a/include/asm-generic/rqspinlock.h > +++ b/include/asm-generic/rqspinlock.h > @@ -12,8 +12,10 @@ > #include > #include > #include > +#include > > struct qspinlock; > +typedef struct qspinlock rqspinlock_t; > > extern int resilient_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val, u64 timeout); > > @@ -82,4 +84,60 @@ static __always_inline void release_held_lock_entry(void) > this_cpu_dec(rqspinlock_held_locks.cnt); > } > > +/** > + * res_spin_lock - acquire a queued spinlock > + * @lock: Pointer to queued spinlock structure > + */ > +static __always_inline int res_spin_lock(rqspinlock_t *lock) > +{ > + int val = 0; > + > + if (likely(atomic_try_cmpxchg_acquire(&lock->val, &val, _Q_LOCKED_VAL))) { > + grab_held_lock_entry(lock); > + return 0; > + } > + return resilient_queued_spin_lock_slowpath(lock, val, RES_DEF_TIMEOUT); > +} > + > +static __always_inline void res_spin_unlock(rqspinlock_t *lock) > +{ > + struct rqspinlock_held *rqh = this_cpu_ptr(&rqspinlock_held_locks); > + > + if (unlikely(rqh->cnt > RES_NR_HELD)) > + goto unlock; > + WRITE_ONCE(rqh->locks[rqh->cnt - 1], NULL); > + /* > + * Release barrier, ensuring ordering. See release_held_lock_entry. > + */ > +unlock: > + queued_spin_unlock(lock); > + this_cpu_dec(rqspinlock_held_locks.cnt); > +} > + > +#define raw_res_spin_lock_init(lock) ({ *(lock) = (struct qspinlock)__ARCH_SPIN_LOCK_UNLOCKED; }) > + > +#define raw_res_spin_lock(lock) \ > + ({ \ > + int __ret; \ > + preempt_disable(); \ > + __ret = res_spin_lock(lock); \ > + if (__ret) \ > + preempt_enable(); \ > + __ret; \ > + }) > + > +#define raw_res_spin_unlock(lock) ({ res_spin_unlock(lock); preempt_enable(); }) > + > +#define raw_res_spin_lock_irqsave(lock, flags) \ > + ({ \ > + int __ret; \ > + local_irq_save(flags); \ > + __ret = raw_res_spin_lock(lock); \ > + if (__ret) \ > + local_irq_restore(flags); \ > + __ret; \ > + }) > + > +#define raw_res_spin_unlock_irqrestore(lock, flags) ({ raw_res_spin_unlock(lock); local_irq_restore(flags); }) > + > #endif /* __ASM_GENERIC_RQSPINLOCK_H */ Lockdep calls aren't included in the helper functions. That means all the *res_spin_lock*() calls will be outside the purview of lockdep. That also means a multi-CPU circular locking dependency involving a mixture of qspinlocks and rqspinlocks may not be detectable. Cheers, Longman