From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95D4B1A4F1F; Tue, 13 Aug 2024 16:39:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723567144; cv=none; b=VoEoMS5V8Z2nXaGd3OaAuAYnDThKz2UXvMzTTiSRu5/33rV+0nLv9kmstbUgQrZEkIRwbxJ9O+pYq0aNRYnVxMrV33VAorKY1ICnz0NOZceZ+wqx9bBNSQ0zvTgPnOqmbbwBytNlDiFjronZlPLDtpBp/RityHatJ0nc3nDhIgA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723567144; c=relaxed/simple; bh=jGqGS/+YMG58IJdMF3CHYLoIBgb4NHC7NMoRVjSo+V4=; h=Message-ID:Date:MIME-Version:Subject:From:To:Cc:References: In-Reply-To:Content-Type; b=MqAXgp3Kf+PjWQGX3iueIAmOH7fPGrcboE1ty+6lc5hQ7H66/Ay31+rDV5We8ojO4EVuEogS7oWLDAwzEp7fR1ylOlOTBAN89edrh3xtAXjuy6K1DQcJyKk5DWVCdxfCI3a1OunnEHRFvxcTIXOq6tOyjzpSLiVjif4O3g8G4t4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DR1AZvqy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DR1AZvqy" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E4A15C4AF0B; Tue, 13 Aug 2024 16:38:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1723567144; bh=jGqGS/+YMG58IJdMF3CHYLoIBgb4NHC7NMoRVjSo+V4=; h=Date:Subject:From:To:Cc:References:In-Reply-To:From; b=DR1AZvqy4Pdt9tz7MMJzuAY3ZG3odaJsUXALOcqP5EoPWlkRblooFHWstoHnwUjoj 98dop0kucQTTTCSD8B7fL337IHJCGUQQrDbBfgFiXiOSLYvpPo/k84kZ0FM3RPCSFN fDOTrZeviBO6wpq0vw68122nXwwesBry47/9W4Y7tBVMdyBt1JHRhTdQT41M0WfpKY 5mVZd/dHVjnQNJIOu4u9PUnoB2npaIEKK0UEc1PWY6aLJ/Af+WD70hv8gos90wCwms lrPslC4ZLKKlWgQekt8gS/6Zl5maKM+5WoER80Z8LYnR6idU/Ke3cqDchwpncuJb7j AAPF5VvNVdwrg== Message-ID: <6320e4f3-e737-4787-8a72-7bd314ba883c@kernel.org> Date: Tue, 13 Aug 2024 18:38:58 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: rockchip: Add base DT for rk3528 SoC From: Krzysztof Kozlowski To: Yao Zi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Greg Kroah-Hartman , Jiri Slaby , Chris Morgan , Jonas Karlman , Tim Lunn , Andy Yan , Muhammed Efe Cetin , Jagan Teki , Dragan Simic , Ondrej Jirman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org References: <20240803125510.4699-2-ziyao@disroot.org> <20240803125510.4699-5-ziyao@disroot.org> <56bd1478-ce8c-4c1d-ab16-afe4ad462bf5@kernel.org> Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/08/2024 16:05, Krzysztof Kozlowski wrote: > On 04/08/2024 15:20, Yao Zi wrote: >>> >>>> + compatible = "fixed-clock"; >>>> + #clock-cells = <0>; >>>> + clock-frequency = <24000000>; >>>> + clock-output-names = "xin24m"; >>>> + }; >>>> + >>>> + gic: interrupt-controller@fed01000 { >>> >>> Why this all is outside of SoC? >> >> Just as Heiko says, device tree for all other Rockchip SoCs don't have >> a "soc" node. I didn't know why before but just follow the style. >> >> If you prefer add a soc node, I am willing to. > > Surprising as usually we expect MMIO nodes being part of SoC to be under > soc@, but if that's Rockchip preference then fine. One more comment, I forgot we actually have it documented long time ago: https://elixir.bootlin.com/linux/v6.11-rc1/source/Documentation/devicetree/bindings/writing-bindings.rst#L90 Best regards, Krzysztof