From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753021AbbJMLNL (ORCPT ); Tue, 13 Oct 2015 07:13:11 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:56875 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752350AbbJMLNJ (ORCPT ); Tue, 13 Oct 2015 07:13:09 -0400 From: Arnd Bergmann To: Bjorn Helgaas Cc: Zhou Wang , Bjorn Helgaas , jingoohan1@gmail.com, pratyush.anand@gmail.com, linux@arm.linux.org.uk, thomas.petazzoni@free-electrons.com, gabriele.paoloni@huawei.com, lorenzo.pieralisi@arm.com, james.morse@arm.com, Liviu.Dudau@arm.com, jason@lakedaemon.net, robh@kernel.org, gabriel.fernandez@linaro.org, Minghuan.Lian@freescale.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, zhangjukuo@huawei.com, qiuzhenfa@hisilicon.com, liudongdong3@huawei.com, qiujiang@huawei.com, xuwei5@hisilicon.com, liguozhu@hisilicon.com, Kefeng Wang , Rob Herring Subject: Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Date: Tue, 13 Oct 2015 13:12:12 +0200 Message-ID: <6336414.HvfCQcuT3Y@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <20151012213545.GA17479@localhost> References: <1444445957-239522-1-git-send-email-wangzhou1@hisilicon.com> <1444445957-239522-5-git-send-email-wangzhou1@hisilicon.com> <20151012213545.GA17479@localhost> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:x4YaHxsnbQ47fCAnz/CtQv6xvRw+tSIdLLtybJBUm/Z4p7QKc1C 8TXTFST8pSz3u1s1A5W4jRdMcPT1m73tVfiOXi47dDCWxAOizzka6HeSTR/K+JBLK8GeQqo ZbXDGm4/MgI7D7bZhCChW/riGQCapdGjaVRpko/+Zz9EvfesdSaJmg6QoURppGHV3Nwvz5Y P/1I8NGsPTfs1ZrmxfYow== X-UI-Out-Filterresults: notjunk:1;V01:K0:sfto4cHpRA0=:jh+dr6h+n6Ghojd/QbFSaR VkKM/MZSEQkp/K7/PYAOzZ0y1vDEeKNnCsSDSPI5r6sDJxafidYdfRj7VsuK0du1jQOdi5Iyf uRUsfPILqumIzI8GeWrk3RoAYhSgQOvvuAenjw+xXilMQhJBLnwr8mVC4hFpBrICHC3Itj+y4 fXhJB1Af9eCKLZiD9q/LuG2NXSc2tvTzjmtbQRGsvEyEDQ/0QJn9PvG+vxv2LM4xqIDtI+OVr yYKKqE3LVJd3wJZE7DmLcBQEohZ1U6aTm52LiZKFf0Mu+KCg9fEcGWA0K0Lqo/ZP4ByrgTRP5 RcccDvGjBnilZHsOb76xrW91WCkIdEY0/nXtxZ6S+8bI0qW+qC4s2Jl60t+/WpMZHtJiaVHAw 6ouwLftHlyK05e9quQlnXMLxhyjDiTLzgdRuQyCXoVsCE4ywE8yHB/PM8lOOGMSgYa17WJJ1t wrSo+a8cNTxSBzF2YLrc83y0FX0soyXvM0cMG0i9lIKJ2sfEPZNm8t2CIcPGxgjfh34fhztWC Rcw/JXPPr3XgDpVHmJn2HVRKdSkBjy0caPEcY8Ax6yhmOhnX54x9cN0J/EOQs8sK3gFbzLXnP JT5Op9LBayHIupXcCNTBGdsCK3GHqwTGZnQYbkno5nGU0MXFivO/cAPVVsfa6TJY3M/h3wUNP pj1ARIPdqtqNZN1SCLpQ6ht4Ap8Yp8nBODTd951MIHFRs9ugxR3ckFC07+pa1UjDICp924DdW 4UHxuIAGNbuYGMJr Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 12 October 2015 16:35:45 Bjorn Helgaas wrote: > > > +{ > > + u64 addr; > > + struct device_node *msi_node; > > + struct resource res; > > + struct device_node *np = pp->dev->of_node; > > + struct hisi_pcie *pcie = to_hisi_pcie(pp); > > + > > + msi_node = of_parse_phandle(np, "msi-parent", 0); > > + if (!msi_node) { > > + dev_err(pp->dev, "failed to find msi-parent\n"); > > + return -EINVAL; > > + } > > + of_address_to_resource(msi_node, 0, &res); > > Does this use the "msi-parent" node in the same way as other drivers > do? I'm sure there must be other places where we extract struct > resource information from an "msi-parent" node, but I don't see them. > > I'm trying to verify that this isn't some kind of incompatible > extension of the "msi-parent" property. I cc'd Arnd and Rob (DT > experts). This is not ok, what this does is that it relies on a particular implementation of the MSI controller and directly accesses its registers. Instead, it should reference only the msi irq domain and let the driver for the MSI controller access the registers. Otherwise this code has to be rewritten once the same PCI host code appears in a machine that has a real GICv2m or GICv3. Arnd