Re: [PATCH] i386 add Intel PEBS and BTS cpufeature bits and detection

[Keith Owens <kaos@sgi.com>]

Andi Kleen (on Sat, 18 Nov 2006 09:24:01 +0100) wrote:
>On Friday 17 November 2006 23:57, Jeremy Fitzhardinge wrote:
>> Andi Kleen wrote:
>> > I have had private patches for that myself, using the MSRs on AMD
>> > and Intel.
>> >   
>> 
>> Would they be something that could be cleaned up into something
>> mergeable?  
>
>Hmm maybe.
>
>> It would be nice to have something that could be left 
>> enabled all the time, 
>
>That would add considerable latency to all exceptions.
>
>And unfortunately we take more than 16 jumps before
>we figure out an oops, so all the previous data would be gone
>if it was only done in the error path.
>
>If the CPU had a "disable LBR on exceptions" bit that would
>work. Unfortunately it hasn't.

LBR is mainly useful on wild branches to random addresses.  As such,
you really only need to disable LBR in the page fault handler.  For a
long time, KDB had LBR support with this replacement for the i386 page
fault handler.

#if defined(CONFIG_KDB)
ENTRY(page_fault_mca)
       pushl %ecx
       pushl %edx
       pushl %eax
       movl  $473,%ecx
       rdmsr
       andl  $0xfffffffe,%eax          /* Disable last branch recording */
       wrmsr
       popl  %eax
       popl  %edx
       popl  %ecx
       pushl $do_page_fault
       jmp error_code
#endif

Nobody was using the LBR feature of KDB so I removed it in 2.6.17.