From: saiprakash.ranjan@codeaurora.org
To: Doug Anderson <dianders@chromium.org>
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
Stephen Boyd <swboyd@chromium.org>,
Matthias Kaehlcke <mka@chromium.org>,
Guenter Roeck <groeck@chromium.org>,
Rob Herring <robh+dt@kernel.org>
Subject: Re: [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node
Date: Fri, 13 Dec 2019 10:01:13 +0530 [thread overview]
Message-ID: <6453ced1f718bf3a214c404b08f8c35b@codeaurora.org> (raw)
In-Reply-To: <CAD=FV=X3Akg07hetQOgd0P_wTVWs3QpuCNQ8O6qQ5LK2ZeWSaQ@mail.gmail.com>
Hi Doug,
On 2019-12-12 00:55, Doug Anderson wrote:
> If you haven't already done it (I couldn't find it), can you please
> add this to "Documentation/devicetree/bindings/watchdog/qcom-wdt.txt"?
> Presumably at the same time it would be good to change the format of
> that file to .yaml.
>
This was the copy paste mistake from sdm845, I will convert the wdog
bindings
to yaml and add missing SoC specific compatible for SC7180, SDM845 and
SM8150.
>
> Unrelated to sc7180, but it also feels like something is awfully
> screwy here in terms of the various Qualcomm device tree files
> referring to watchdog timers. It feels wrong, but perhaps you can
> educate me on how it works and I'll see the light. Specifically:
>
> 1. It seems like the same node is used for two things on other Qualcomm
> SoCs
>
> If I grep the bindings for "qcom,kpss-timer" or "qcom,scss-timer", I
> get two hits:
>
> Documentation/devicetree/bindings/timer/qcom,msm-timer.txt
> Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
>
> ...and, in fact, there appear to be two drivers claiming compatibility
> here:
>
> drivers/clocksource/timer-qcom.c
> drivers/watchdog/qcom-wdt.c
>
> That seems super odd to me. Is that really right? We have two
> drivers probing against the same device tree nodes? ...and that's OK?
> If so, why does only one of the bindings list the SoC-specific
> bindings names?
>
This was before my time, but scratching my head and some internal docs
and git history reveals that watchdog was part of the timer block in
APQ8064, MSM8960. However in IPQ4019, watchdog was standalone and split
from timer block.
Below links gives us some more background:
https://groups.google.com/forum/#!topic/linux.kernel/UnDgqU8QgLU
https://patchwork.kernel.org/patch/5868261/
>
> 2. The actual nodes look really wonky. A few examples below:
>
> 2a) arch/arm/boot/dts/qcom-apq8064.dtsi:
> compatible = "qcom,kpss-timer", "qcom,kpss-wdt-apq8064",
> "qcom,msm-timer";
>
> ...why is the SoC-specific compatible string in the middle? The
> SoC-specific one should be first.
Yes, SoC specific compatible should come first, I guess they just didn't
care when
it was merged.
>
> 2b) arch/arm/boot/dts/qcom-ipq4019.dtsi:
> compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019";
>
> ...same question, but in this case there is no "msm-timer" at the end?
>
IPQ4019 had watchdog as standalone outside of timer block as explained
above.
> 2c) arch/arm64/boot/dts/qcom/qcs404.dtsi
> compatible = "qcom,kpss-wdt";
>
> ...no SoC-specific string at all?
>
Needs a SoC specific compatible, I am going to add this in my coming
patch.
Thanks,
Sai
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a
member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2019-12-13 4:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1576037078.git.saiprakash.ranjan@codeaurora.org>
2019-12-11 4:30 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node Sai Prakash Ranjan
2019-12-11 19:25 ` Doug Anderson
2019-12-13 4:31 ` saiprakash.ranjan [this message]
2019-12-11 4:30 ` [PATCH 2/3] arm64: dts: qcom: sm8150: " Sai Prakash Ranjan
2019-12-11 4:30 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add Last level cache controller node Sai Prakash Ranjan
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