* [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node [not found] <cover.1576037078.git.saiprakash.ranjan@codeaurora.org> @ 2019-12-11 4:30 ` Sai Prakash Ranjan 2019-12-11 19:25 ` Doug Anderson 2019-12-11 4:30 ` [PATCH 2/3] arm64: dts: qcom: sm8150: " Sai Prakash Ranjan 2019-12-11 4:30 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add Last level cache controller node Sai Prakash Ranjan 2 siblings, 1 reply; 5+ messages in thread From: Sai Prakash Ranjan @ 2019-12-11 4:30 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson Cc: devicetree, linux-arm-kernel, linux-kernel, linux-arm-msm, Stephen Boyd, Matthias Kaehlcke, Sai Prakash Ranjan Add APSS (Application Processor Subsystem) watchdog DT node for SC7180 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 666e9b92c7ad..a6773ad3738b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1038,6 +1038,12 @@ }; }; + watchdog@17c10000 { + compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt"; + reg = <0 0x17c10000 0 0x1000>; + clocks = <&sleep_clk>; + }; + timer@17c20000{ #address-cells = <2>; #size-cells = <2>; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node 2019-12-11 4:30 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node Sai Prakash Ranjan @ 2019-12-11 19:25 ` Doug Anderson 2019-12-13 4:31 ` saiprakash.ranjan 0 siblings, 1 reply; 5+ messages in thread From: Doug Anderson @ 2019-12-11 19:25 UTC (permalink / raw) To: Sai Prakash Ranjan Cc: Andy Gross, Bjorn Andersson, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux ARM, LKML, linux-arm-msm, Stephen Boyd, Matthias Kaehlcke, Guenter Roeck, Rob Herring Sai, On Tue, Dec 10, 2019 at 8:30 PM Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> wrote: > > Add APSS (Application Processor Subsystem) watchdog > DT node for SC7180 SoC. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 666e9b92c7ad..a6773ad3738b 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -1038,6 +1038,12 @@ > }; > }; > > + watchdog@17c10000 { > + compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt"; If you haven't already done it (I couldn't find it), can you please add this to "Documentation/devicetree/bindings/watchdog/qcom-wdt.txt"? Presumably at the same time it would be good to change the format of that file to .yaml. Unrelated to sc7180, but it also feels like something is awfully screwy here in terms of the various Qualcomm device tree files referring to watchdog timers. It feels wrong, but perhaps you can educate me on how it works and I'll see the light. Specifically: 1. It seems like the same node is used for two things on other Qualcomm SoCs If I grep the bindings for "qcom,kpss-timer" or "qcom,scss-timer", I get two hits: Documentation/devicetree/bindings/timer/qcom,msm-timer.txt Documentation/devicetree/bindings/watchdog/qcom-wdt.txt ...and, in fact, there appear to be two drivers claiming compatibility here: drivers/clocksource/timer-qcom.c drivers/watchdog/qcom-wdt.c That seems super odd to me. Is that really right? We have two drivers probing against the same device tree nodes? ...and that's OK? If so, why does only one of the bindings list the SoC-specific bindings names? 2. The actual nodes look really wonky. A few examples below: 2a) arch/arm/boot/dts/qcom-apq8064.dtsi: compatible = "qcom,kpss-timer", "qcom,kpss-wdt-apq8064", "qcom,msm-timer"; ...why is the SoC-specific compatible string in the middle? The SoC-specific one should be first. 2b) arch/arm/boot/dts/qcom-ipq4019.dtsi: compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019"; ...same question, but in this case there is no "msm-timer" at the end? 2c) arch/arm64/boot/dts/qcom/qcs404.dtsi compatible = "qcom,kpss-wdt"; ...no SoC-specific string at all? Thanks! -Doug ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node 2019-12-11 19:25 ` Doug Anderson @ 2019-12-13 4:31 ` saiprakash.ranjan 0 siblings, 0 replies; 5+ messages in thread From: saiprakash.ranjan @ 2019-12-13 4:31 UTC (permalink / raw) To: Doug Anderson Cc: Andy Gross, Bjorn Andersson, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, Linux ARM, LKML, linux-arm-msm, Stephen Boyd, Matthias Kaehlcke, Guenter Roeck, Rob Herring Hi Doug, On 2019-12-12 00:55, Doug Anderson wrote: > If you haven't already done it (I couldn't find it), can you please > add this to "Documentation/devicetree/bindings/watchdog/qcom-wdt.txt"? > Presumably at the same time it would be good to change the format of > that file to .yaml. > This was the copy paste mistake from sdm845, I will convert the wdog bindings to yaml and add missing SoC specific compatible for SC7180, SDM845 and SM8150. > > Unrelated to sc7180, but it also feels like something is awfully > screwy here in terms of the various Qualcomm device tree files > referring to watchdog timers. It feels wrong, but perhaps you can > educate me on how it works and I'll see the light. Specifically: > > 1. It seems like the same node is used for two things on other Qualcomm > SoCs > > If I grep the bindings for "qcom,kpss-timer" or "qcom,scss-timer", I > get two hits: > > Documentation/devicetree/bindings/timer/qcom,msm-timer.txt > Documentation/devicetree/bindings/watchdog/qcom-wdt.txt > > ...and, in fact, there appear to be two drivers claiming compatibility > here: > > drivers/clocksource/timer-qcom.c > drivers/watchdog/qcom-wdt.c > > That seems super odd to me. Is that really right? We have two > drivers probing against the same device tree nodes? ...and that's OK? > If so, why does only one of the bindings list the SoC-specific > bindings names? > This was before my time, but scratching my head and some internal docs and git history reveals that watchdog was part of the timer block in APQ8064, MSM8960. However in IPQ4019, watchdog was standalone and split from timer block. Below links gives us some more background: https://groups.google.com/forum/#!topic/linux.kernel/UnDgqU8QgLU https://patchwork.kernel.org/patch/5868261/ > > 2. The actual nodes look really wonky. A few examples below: > > 2a) arch/arm/boot/dts/qcom-apq8064.dtsi: > compatible = "qcom,kpss-timer", "qcom,kpss-wdt-apq8064", > "qcom,msm-timer"; > > ...why is the SoC-specific compatible string in the middle? The > SoC-specific one should be first. Yes, SoC specific compatible should come first, I guess they just didn't care when it was merged. > > 2b) arch/arm/boot/dts/qcom-ipq4019.dtsi: > compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019"; > > ...same question, but in this case there is no "msm-timer" at the end? > IPQ4019 had watchdog as standalone outside of timer block as explained above. > 2c) arch/arm64/boot/dts/qcom/qcs404.dtsi > compatible = "qcom,kpss-wdt"; > > ...no SoC-specific string at all? > Needs a SoC specific compatible, I am going to add this in my coming patch. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/3] arm64: dts: qcom: sm8150: Add APSS watchdog node [not found] <cover.1576037078.git.saiprakash.ranjan@codeaurora.org> 2019-12-11 4:30 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node Sai Prakash Ranjan @ 2019-12-11 4:30 ` Sai Prakash Ranjan 2019-12-11 4:30 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add Last level cache controller node Sai Prakash Ranjan 2 siblings, 0 replies; 5+ messages in thread From: Sai Prakash Ranjan @ 2019-12-11 4:30 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson Cc: devicetree, linux-arm-kernel, linux-kernel, linux-arm-msm, Stephen Boyd, Matthias Kaehlcke, Sai Prakash Ranjan Add APSS (Application Processor Subsystem) watchdog DT node for SM8150 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 8f23fcadecb8..4224f6474a9d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -387,6 +387,12 @@ #mbox-cells = <1>; }; + watchdog@17c10000 { + compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt"; + reg = <0 0x17c10000 0 0x1000>; + clocks = <&sleep_clk>; + }; + timer@17c20000 { #address-cells = <2>; #size-cells = <2>; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] arm64: dts: qcom: sc7180: Add Last level cache controller node [not found] <cover.1576037078.git.saiprakash.ranjan@codeaurora.org> 2019-12-11 4:30 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node Sai Prakash Ranjan 2019-12-11 4:30 ` [PATCH 2/3] arm64: dts: qcom: sm8150: " Sai Prakash Ranjan @ 2019-12-11 4:30 ` Sai Prakash Ranjan 2 siblings, 0 replies; 5+ messages in thread From: Sai Prakash Ranjan @ 2019-12-11 4:30 UTC (permalink / raw) To: Andy Gross, Bjorn Andersson Cc: devicetree, linux-arm-kernel, linux-kernel, linux-arm-msm, Stephen Boyd, Matthias Kaehlcke, Sai Prakash Ranjan Add device tree node for LLCC aka system cache controller for SC7180 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a6773ad3738b..e1567109adc4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -911,6 +911,13 @@ status = "disabled"; }; + system-cache-controller@9200000 { + compatible = "qcom,sc7180-llcc"; + reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; + reg-names = "llcc_base", "llcc_broadcast_base"; + interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; + }; + spmi_bus: spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0 0x0c440000 0 0x1100>, --- This patch depends on the llcc binding change already reviewed at: - https://patchwork.kernel.org/patch/11246055/ -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation ^ permalink raw reply related [flat|nested] 5+ messages in thread
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2019-12-11 4:30 ` [PATCH 1/3] arm64: dts: qcom: sc7180: Add APSS watchdog node Sai Prakash Ranjan
2019-12-11 19:25 ` Doug Anderson
2019-12-13 4:31 ` saiprakash.ranjan
2019-12-11 4:30 ` [PATCH 2/3] arm64: dts: qcom: sm8150: " Sai Prakash Ranjan
2019-12-11 4:30 ` [PATCH 3/3] arm64: dts: qcom: sc7180: Add Last level cache controller node Sai Prakash Ranjan
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