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[93.34.89.13]) by smtp.gmail.com with ESMTPSA id c19-20020a05600c0ad300b00405c33a9a12sm2415923wmr.0.2023.09.30.05.04.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Sep 2023 05:04:31 -0700 (PDT) Message-ID: <65180ecf.050a0220.10a98.7a51@mx.google.com> X-Google-Original-Message-ID: Date: Sat, 30 Sep 2023 14:04:29 +0200 From: Christian Marangi To: Vincent Whitchurch Cc: "linux-stm32@st-md-mailman.stormreply.com" , "davem@davemloft.net" , "liuhangbin@gmail.com" , "linux-wireless@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "pabeni@redhat.com" , "jiri@resnulli.us" , "joabreu@synopsys.com" , "rajur@chelsio.com" , "horms@kernel.org" , "kuba@kernel.org" , "kvalo@kernel.org" , "alexandre.torgue@foss.st.com" , "mcoquelin.stm32@gmail.com" , "daniel@iogearbox.net" , "netdev@vger.kernel.org" , "edumazet@google.com" , "linux-arm-kernel@lists.infradead.org" , "pkshih@realtek.com" Subject: Re: [net-next PATCH 2/3] net: stmmac: improve TX timer arm logic References: <20230922111247.497-1-ansuelsmth@gmail.com> <20230922111247.497-2-ansuelsmth@gmail.com> <0a62a2b6bff4fd01065e0de6a8703c96e344f1dc.camel@axis.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <0a62a2b6bff4fd01065e0de6a8703c96e344f1dc.camel@axis.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 29, 2023 at 12:38:48PM +0000, Vincent Whitchurch wrote: > On Fri, 2023-09-22 at 13:12 +0200, Christian Marangi wrote: > > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > > index 9201ed778ebc..14bf6fae6662 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > > @@ -2994,13 +2994,25 @@ static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue) > >  { > >   struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; > >   u32 tx_coal_timer = priv->tx_coal_timer[queue]; > > + struct stmmac_channel *ch; > > + struct napi_struct *napi; > >   > > > >   if (!tx_coal_timer) > >   return; > >   > > > > - hrtimer_start(&tx_q->txtimer, > > - STMMAC_COAL_TIMER(tx_coal_timer), > > - HRTIMER_MODE_REL); > > + ch = &priv->channel[tx_q->queue_index]; > > + napi = tx_q->xsk_pool ? &ch->rxtx_napi : &ch->tx_napi; > > + > > + /* Arm timer only if napi is not already scheduled. > > + * Try to cancel any timer if napi is scheduled, timer will be armed > > + * again in the next scheduled napi. > > + */ > > + if (unlikely(!napi_is_scheduled(napi))) > > + hrtimer_start(&tx_q->txtimer, > > + STMMAC_COAL_TIMER(tx_coal_timer), > > + HRTIMER_MODE_REL); > > + else > > + hrtimer_try_to_cancel(&tx_q->txtimer); > > When this function is called from within the napi poll function > (stmmac_tx_clean()), NAPI_STATE_SCHED will always be set and so after > this patch the "We still have pending packets, let's call for a new > scheduling" logic will never start the timer. Was that really > intentional? > No and understanding the code flow of napi and tx-coal is hard... (also problem with tx coal arise only with real world scenario and now with synthetic tests like iperf. I will shortly send a v2 of this that will just move the logic of arming the TX timer outside napi call after DMA interrupt is enabled again. Currently testing the new version on openwrt with ipq806x hoping everything is good. (same perf increase observed but no queue timeout) -- Ansuel