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From: Alexey Kardashevskiy <aik@amd.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Xu Yilun <yilun.xu@linux.intel.com>,
	kvm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org,
	sumit.semwal@linaro.org, christian.koenig@amd.com,
	pbonzini@redhat.com, seanjc@google.com,
	alex.williamson@redhat.com, vivek.kasireddy@intel.com,
	dan.j.williams@intel.com, yilun.xu@intel.com,
	linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org,
	lukas@wunner.de, yan.y.zhao@intel.com, daniel.vetter@ffwll.ch,
	leon@kernel.org, baolu.lu@linux.intel.com,
	zhenzhong.duan@intel.com, tao1.su@intel.com
Subject: Re: [RFC PATCH 04/12] vfio/pci: Allow MMIO regions to be exported through dma-buf
Date: Tue, 12 May 2026 15:49:51 +1000	[thread overview]
Message-ID: <651ddf59-68e2-482e-a7ba-c238a626e1ba@amd.com> (raw)
In-Reply-To: <20260511235617.GG1116784@nvidia.com>


On 12/5/26 09:56, Jason Gunthorpe wrote:
> On Tue, May 12, 2026 at 09:42:01AM +1000, Alexey Kardashevskiy wrote:
> 
>>> true but either way dmabuf slicing will be directed by QEMU's msix-table
>>> emulation MR and this slicing needs to match the TDISP report so I'll
>>> have to teach QEMU these reports, right?
>>
>> Or TDISP devices are going to align MSIX BARs to 4K, and QEMU will
>> do the same and it should "just work", and if it does not - the host
>> won't crash. Can this work? Thanks,
> 
> Host crashing stuff is a different issue, I think the plan was to
> revoke the entire MMIO space from userspace and remove it from the
> kernel mapping. Entire because we don't want to parse the TDISP report
> to figure out something more narrow.
> 
> Therefore there is no way the host can crash.

Ah ok.

> When qemu constructs the VM memory map it already has a scheme to
> insert a hole for a SW emulated page for MSI. That will keep working
> exactly as it is.
>
> When the VM validates the MMIO the hole has to fall within a T=0 space
> of the TDISP report or the VM will reject it.
> 
> This means devices need to have a T=0 hole around their MSI-X/etc
> suitable for a 64K page size OS.

Since we are ditching mappings, the entire MSIX-containing 64K block will be ioctl()ed instead of directly accessed from QEMU via mmap (which is slower the VM direct access but still)?

> This is already the case, if a device mixes MSIx with other things
> qemu will work but it becomes horribly slow and a little broken.

Really only when MSIX is not system page size aligned but yeah, I had enough of that with PPC. Thanks,

> 
> Jason

-- 
Alexey


      reply	other threads:[~2026-05-12  5:50 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20250107142719.179636-1-yilun.xu@linux.intel.com>
     [not found] ` <20250107142719.179636-5-yilun.xu@linux.intel.com>
2026-05-06  2:35   ` [RFC PATCH 04/12] vfio/pci: Allow MMIO regions to be exported through dma-buf Alexey Kardashevskiy
2026-05-06 13:16     ` Jason Gunthorpe
2026-05-07  7:16       ` Alexey Kardashevskiy
2026-05-11 12:01         ` Jason Gunthorpe
2026-05-11 23:42         ` Alexey Kardashevskiy
2026-05-11 23:56           ` Jason Gunthorpe
2026-05-12  5:49             ` Alexey Kardashevskiy [this message]

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