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From: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/7] dt-bindings: soc: st: document the RISAB firewall peripheral
Date: Tue, 17 Feb 2026 14:12:29 +0100	[thread overview]
Message-ID: <66ecf6a5-cc1f-4872-971d-6bc32894dbac@foss.st.com> (raw)
In-Reply-To: <ac793499-bebb-477b-b27e-089529f3ee4b@kernel.org>



On 2/13/26 16:06, Krzysztof Kozlowski wrote:
> On 10/02/2026 10:55, Gatien CHEVALLIER wrote:
>>>> +  memory-region:
>>>> +    minItems: 1
>>>> +    maxItems: 32
>>>> +    description:
>>>> +      Phandle to nodes describing memory regions to be configured in the RISAB
>>>> +      by the trusted domain of at least a RISAB page size.
>>>> +      These regions cannot overlap. A zone must be within st,mem-map range and
>>>> +      can be represented by one or more pages.
>>>> +
>>>> +  st,mem-map:
>>>> +    $ref: /schemas/types.yaml#/definitions/uint32-array
>>>> +    description: Memory address range covered by the RISAB.
>>>> +    items:
>>>> +      - description: Memory range base address
>>>> +      - description: Memory range size
>>>
>>> Why do you need this property if you have memory-region already? This
>>> also should be part of <reg>, although this mixing with memory-region is
>>> anyway confusing.
>>>
>>
>> The RISAB is a memory firewall peripheral covering internal RAMs. It is
>> possible to configure multiple memory regions within these RAMs (done by
>> the Trusted Domain) with security, privilege and compartment isolation.
>> This peripheral allow 4kBytes page granularity. Each page can hold
>> different access rights, with 32 pages at most (hence the maxItems: 32).
>> That is some information that can be added to the documentation.
>>
>> Moreover, when a region is delegated to a non-secure privileged
>> component, this component can configure the privilege level necessary to
>> access the region.
>>
>> This property gives me the opportunity to get the memory range covered
>> by the RISAB. "reg" here is used to access the actual RISAB registers
>> holding the configuration.
> 
> Looks awfully like memory regions still :/
> 

IIUC the memory-region property references memory regions within
a reserved memory. Which is not really what I want to describe
here as I want to get the boundaries of the whole range. The
memory-region property would be used by the Trusted Domain / kernel
to get each regions (or only one that represents the whole range) of the
internal RAM to apply desired access rights to them / use them.

Describing the memory range using a reserved memory would make the
kernel exclude this memory range from the normal usage, no?

I think declaring a "boundaries" memory region with no usage for the
kernel wouldn't make sense. The kernel may not be able to access the
whole memory range.

>>
>>>> +
>>>> +  st,srwiad:
>>>> +    description:
>>>> +      When set, the trusted domain configures the RISAB to allow secure
>>>> +      read/write data accesses to non-secure blocks and pages. Secure execute
>>>> +      remains illegal.
>>>> +    type: boolean
>>>
>>> Shouldn't this be a property of given block from memory-regions, not
>>> entire RISAB?
>>>
>>
>> It is a global setting for the whole RISAB (in RISAB_CR register) so I
>> think it's fine keeping it at RISAB level.
> 
> And in the next version of your IP? It really feels like description of
> memory region, not the entire device.
> 

Then I would expect it to be part of the page-based configuration and
this property could be constrained to current platforms. Is that fine?

Best regards,
Gatien

> 
> Best regards,
> Krzysztof


  reply	other threads:[~2026-02-17 13:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-09 14:59 [PATCH 0/7] soc: st: add RISAB dump debug driver Gatien Chevallier
2026-02-09 14:59 ` [PATCH 1/7] dt-bindings: soc: st: document the RISAB firewall peripheral Gatien Chevallier
2026-02-10  7:57   ` Krzysztof Kozlowski
2026-02-10  9:55     ` Gatien CHEVALLIER
2026-02-13 15:06       ` Krzysztof Kozlowski
2026-02-17 13:12         ` Gatien CHEVALLIER [this message]
2026-02-17 20:06           ` Krzysztof Kozlowski
2026-02-18 10:38             ` Gatien CHEVALLIER
2026-02-18 20:03               ` Krzysztof Kozlowski
2026-02-19 14:02                 ` Gatien CHEVALLIER
2026-02-26 18:13                   ` Krzysztof Kozlowski
2026-03-02 15:09                     ` Gatien CHEVALLIER
2026-03-06  8:33                       ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 2/7] soc: st: add RISAB dump debug driver Gatien Chevallier
2026-02-10  7:50   ` Krzysztof Kozlowski
2026-02-10  9:57     ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 3/7] arm64: dts: st: add RISAB1/2/3/4/5/6 nodes to stm32mp251.dtsi Gatien Chevallier
2026-02-10  7:51   ` Krzysztof Kozlowski
2026-02-10  9:58     ` Gatien CHEVALLIER
2026-02-09 14:59 ` [PATCH 4/7] arm64: dts: st: add RISAB1/2/3/4/5/6 nodes to stm32mp231.dtsi Gatien Chevallier
2026-02-09 14:59 ` [PATCH 5/7] arm64: dts: st: enable all RISAB instances on the stm32mp257f-ev1 board Gatien Chevallier
2026-02-09 14:59 ` [PATCH 6/7] arm64: dts: st: enable all RISAB instances on the stm32mp257f-dk board Gatien Chevallier
2026-02-09 14:59 ` [PATCH 7/7] arm64: dts: st: enable all RISAB instances on the stm32mp235f-dk board Gatien Chevallier

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