From: Reinette Chatre <reinette.chatre@intel.com>
To: Babu Moger <babu.moger@amd.com>, <fenghua.yu@intel.com>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>
Cc: <eranian@google.com>, <dave.hansen@linux.intel.com>,
<x86@kernel.org>, <hpa@zytor.com>, <corbet@lwn.net>,
<linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<bagasdotme@gmail.com>
Subject: Re: [PATCH v3 01/10] x86/resctrl: Fix min_cbm_bits for AMD
Date: Tue, 23 Aug 2022 13:56:10 -0700 [thread overview]
Message-ID: <673b861a-5c87-e066-09cc-d17e2d16ef68@intel.com> (raw)
In-Reply-To: <166117577023.6695.4825793379162387650.stgit@bmoger-ubuntu>
Hi Babu,
On 8/22/2022 6:42 AM, Babu Moger wrote:
> AMD systems support zero CBM (capacity bit mask) for L3 allocation.
> That is reflected in rdt_init_res_defs_amd() by:
>
> r->cache.arch_has_empty_bitmaps = true;
>
> However given the unified code in cbm_validate(), checking for:
> val == 0 && !arch_has_empty_bitmaps
>
> is not enough because of another check in cbm_validate():
>
> if ((zero_bit - first_bit) < r->cache.min_cbm_bits)
>
> The default value of r->cache.min_cbm_bits = 1.
>
> Leading to:
>
> $ cd /sys/fs/resctrl
> $ mkdir foo
> $ cd foo
> $ echo L3:0=0 > schemata
> -bash: echo: write error: Invalid argument
> $ cat /sys/fs/resctrl/info/last_cmd_status
> Need at least 1 bits in the mask
>
> Fix the issue by initializing the min_cbm_bits to 0 for AMD. Also remove
> the default setting of min_cbm_bits and initialize it separately.
>
> After the fix
> $ cd /sys/fs/resctrl
> $ mkdir foo
> $ cd foo
> $ echo L3:0=0 > schemata
> $ cat /sys/fs/resctrl/info/last_cmd_status
> ok
>
> Link: https://lore.kernel.org/lkml/20220517001234.3137157-1-eranian@google.com/
> Fixes: 316e7f901f5a ("x86/resctrl: Add struct rdt_cache::arch_has_{sparse, empty}_bitmaps")
> Signed-off-by: Stephane Eranian <eranian@google.com>
> Signed-off-by: Babu Moger <babu.moger@amd.com>
> Reviewed-by: Ingo Molnar <mingo@kernel.org>
> ---
> arch/x86/kernel/cpu/resctrl/core.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index bb1c3f5f60c8..a5c51a14fbce 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -66,9 +66,6 @@ struct rdt_hw_resource rdt_resources_all[] = {
> .rid = RDT_RESOURCE_L3,
> .name = "L3",
> .cache_level = 3,
> - .cache = {
> - .min_cbm_bits = 1,
> - },
> .domains = domain_init(RDT_RESOURCE_L3),
> .parse_ctrlval = parse_cbm,
> .format_str = "%d=%0*x",
> @@ -83,9 +80,6 @@ struct rdt_hw_resource rdt_resources_all[] = {
> .rid = RDT_RESOURCE_L2,
> .name = "L2",
> .cache_level = 2,
> - .cache = {
> - .min_cbm_bits = 1,
> - },
> .domains = domain_init(RDT_RESOURCE_L2),
> .parse_ctrlval = parse_cbm,
> .format_str = "%d=%0*x",
> @@ -877,6 +871,7 @@ static __init void rdt_init_res_defs_intel(void)
> r->cache.arch_has_sparse_bitmaps = false;
> r->cache.arch_has_empty_bitmaps = false;
> r->cache.arch_has_per_cpu_cfg = false;
> + r->cache.min_cbm_bits = 1;
> } else if (r->rid == RDT_RESOURCE_MBA) {
> hw_res->msr_base = MSR_IA32_MBA_THRTL_BASE;
> hw_res->msr_update = mba_wrmsr_intel;
> @@ -897,6 +892,7 @@ static __init void rdt_init_res_defs_amd(void)
> r->cache.arch_has_sparse_bitmaps = true;
> r->cache.arch_has_empty_bitmaps = true;
> r->cache.arch_has_per_cpu_cfg = true;
> + r->cache.min_cbm_bits = 0;
> } else if (r->rid == RDT_RESOURCE_MBA) {
> hw_res->msr_base = MSR_IA32_MBA_BW_BASE;
> hw_res->msr_update = mba_wrmsr_amd;
>
>
Thank you for putting this together.
This change makes arch_has_empty_bitmaps redundant. Can it be removed?
Reinette
next prev parent reply other threads:[~2022-08-23 20:56 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-22 13:42 [PATCH v3 00/10] x86/resctrl: Support for AMD QoS new features and bug fix Babu Moger
2022-08-22 13:42 ` [PATCH v3 01/10] x86/resctrl: Fix min_cbm_bits for AMD Babu Moger
2022-08-23 20:56 ` Reinette Chatre [this message]
2022-08-24 15:58 ` Moger, Babu
2022-08-22 13:42 ` [PATCH v3 02/10] x86/cpufeatures: Add Slow Memory Bandwidth Allocation feature flag Babu Moger
2022-08-23 22:47 ` Reinette Chatre
2022-08-25 22:42 ` Moger, Babu
2022-08-26 16:17 ` Reinette Chatre
2022-08-29 23:25 ` Babu Moger
2022-08-30 16:39 ` Reinette Chatre
[not found] ` <3aa991a8-ac08-297d-8328-5380897f6dd9@amd.com>
2022-08-30 22:23 ` Reinette Chatre
2022-08-30 22:28 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 03/10] x86/resctrl: Add a new resource type RDT_RESOURCE_SMBA Babu Moger
2022-08-24 17:39 ` Reinette Chatre
2022-08-26 14:59 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 04/10] x86/resctrl: Detect and configure Slow Memory Bandwidth allocation Babu Moger
2022-08-23 22:47 ` Reinette Chatre
2022-08-24 16:48 ` Moger, Babu
2022-08-22 13:43 ` [PATCH v3 05/10] x86/cpufeatures: Add Bandwidth Monitoring Event Configuration feature flag Babu Moger
2022-08-22 13:43 ` [PATCH v3 06/10] x86/resctrl: Introduce mon_configurable to detect Bandwidth Monitoring Event Configuration Babu Moger
2022-08-24 21:15 ` Reinette Chatre
2022-08-25 15:11 ` Moger, Babu
2022-08-25 15:56 ` Reinette Chatre
2022-08-25 20:44 ` Moger, Babu
2022-08-25 21:24 ` Reinette Chatre
2022-08-26 14:30 ` Babu Moger
2022-08-22 13:43 ` [PATCH v3 07/10] x86/resctrl: Add sysfs interface files to read/write event configuration Babu Moger
2022-08-24 21:15 ` Reinette Chatre
2022-08-26 16:07 ` Moger, Babu
2022-08-26 16:35 ` Reinette Chatre
2022-08-26 16:57 ` Moger, Babu
2022-08-22 13:44 ` [PATCH v3 08/10] x86/resctrl: Add the sysfs interface to read the " Babu Moger
2022-08-22 13:47 ` Bagas Sanjaya
2022-08-22 13:50 ` Moger, Babu
2022-08-22 13:55 ` Moger, Babu
2022-08-23 1:55 ` Bagas Sanjaya
2022-08-24 21:16 ` Reinette Chatre
2022-08-26 16:49 ` Moger, Babu
2022-08-26 17:34 ` Reinette Chatre
2022-08-26 18:34 ` Moger, Babu
2022-08-22 13:44 ` [PATCH v3 09/10] x86/resctrl: Add sysfs interface to write " Babu Moger
2022-08-24 21:16 ` Reinette Chatre
2022-08-26 18:17 ` Moger, Babu
2022-08-22 13:45 ` [PATCH v3 10/10] Documentation/x86: Update resctrl_ui.rst for new features Babu Moger
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