[PATCH v4 0/2] clk: add assigned-clock-rates-u64

[PATCH v4 0/2] clk: add assigned-clock-rates-u64

[Peng Fan (OSS)]

i.MX95 PLL VCO supports rates that exceeds UINT32_MAX, and the
i.MX95 System Controller Management Firmware(SCMI) server exports
PLL VCO for SCMI Agents to configure. So introduce
assigned-clock-rates-u64 to support rates that exceeds UINT32_MAX.
And introduce of_property_for_each_u64 to iterate each u64 rate.

The PR to add assigned-clock-rates-u64 to dt-schema has been merged:
https://github.com/devicetree-org/dt-schema/pull/140

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
Changes in v4:
- Follow Stephen's suggestion to simplify code for patch 2. Thanks for sharing the
  detailed code
- Note again, patch 1 and patch 2 is not relevant as of now. Just for
  simple for reviewing and know the history, still put them in same patchset.
- Link to v3: https://lore.kernel.org/r/20240730-clk-u64-v3-0-4d2b19edaa6e@nxp.com

Changes in v3:
- Add R-b for patch 1
- Rewrite patch 2 to avoid duplicated code. Patch 2 not use code from
  patch 1 now, but since patch 1 is a helper, so keep it.
- Link to v2: https://lore.kernel.org/r/20240729-clk-u64-v2-0-ffa62ee437e6@nxp.com

Changes in v2:
- Follow what Luca did to of_property_for_each_u32 to write of_property_for_each_u64
- Link to v1: https://lore.kernel.org/r/20240621-clk-u64-v1-0-d28a611b2621@nxp.com

---
Peng Fan (2):
      of: property: add of_property_for_each_u64
      clk: clk-conf: support assigned-clock-rates-u64

 drivers/clk/clk-conf.c | 42 +++++++++++++++++++++++++++++++++++++-----
 drivers/of/property.c  | 23 +++++++++++++++++++++++
 include/linux/of.h     | 23 +++++++++++++++++++++++
 3 files changed, 83 insertions(+), 5 deletions(-)
---
base-commit: 233a3e45c39db1e52061f3b6bbab9c630845dfad
change-id: 20240621-clk-u64-70c4333f0f80

Best regards,
-- 
Peng Fan <peng.fan@nxp.com>

[PATCH v4 1/2] of: property: add of_property_for_each_u64

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Preparing for assigned-clock-rates-u64 support, add function
of_property_for_each_u64 to iterate each u64 value

Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/of/property.c | 23 +++++++++++++++++++++++
 include/linux/of.h    | 23 +++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/drivers/of/property.c b/drivers/of/property.c
index 164d77cb9445..f70fd8deb9cd 100644
--- a/drivers/of/property.c
+++ b/drivers/of/property.c
@@ -548,6 +548,29 @@ const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,
 }
 EXPORT_SYMBOL_GPL(of_prop_next_u32);
 
+const __be64 *of_prop_next_u64(struct property *prop, const __be64 *cur,
+			       u64 *pu)
+{
+	const void *curv = cur;
+
+	if (!prop)
+		return NULL;
+
+	if (!cur) {
+		curv = prop->value;
+		goto out_val;
+	}
+
+	curv += sizeof(*cur);
+	if (curv >= prop->value + prop->length)
+		return NULL;
+
+out_val:
+	*pu = be64_to_cpup(curv);
+	return curv;
+}
+EXPORT_SYMBOL_GPL(of_prop_next_u64);
+
 const char *of_prop_next_string(struct property *prop, const char *cur)
 {
 	const void *curv = cur;
diff --git a/include/linux/of.h b/include/linux/of.h
index 85b60ac9eec5..de481a4bdad0 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -437,6 +437,16 @@ extern int of_detach_node(struct device_node *);
  */
 const __be32 *of_prop_next_u32(struct property *prop, const __be32 *cur,
 			       u32 *pu);
+
+/*
+ * u64 u;
+ *
+ * of_property_for_each_u64(np, "propname", u)
+ *         printk("U64 value: %llx\n", u);
+ */
+const __be64 *of_prop_next_u64(struct property *prop, const __be64 *cur,
+			       u64 *pu);
+
 /*
  * struct property *prop;
  * const char *s;
@@ -832,6 +842,12 @@ static inline const __be32 *of_prop_next_u32(struct property *prop,
 	return NULL;
 }
 
+static inline const __be64 *of_prop_next_u64(struct property *prop,
+		const __be64 *cur, u64 *pu)
+{
+	return NULL;
+}
+
 static inline const char *of_prop_next_string(struct property *prop,
 		const char *cur)
 {
@@ -1436,6 +1452,13 @@ static inline int of_property_read_s32(const struct device_node *np,
 	     _it.item;							\
 	     _it.item = of_prop_next_u32(_it.prop, _it.item, &u))
 
+#define of_property_for_each_u64(np, propname, u)			\
+	for (struct {struct property *prop; const __be64 *item; } _it =	\
+		{of_find_property(np, propname, NULL),			\
+		 of_prop_next_u64(_it.prop, NULL, &u)};			\
+		_it.item;						\
+		_it.item = of_prop_next_u64(_it.prop, _it.item, &u))
+
 #define of_property_for_each_string(np, propname, prop, s)	\
 	for (prop = of_find_property(np, propname, NULL),	\
 		s = of_prop_next_string(prop, NULL);		\

-- 
2.37.1

[PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-u64

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

i.MX95 System Management Control Firmware(SCMI) manages the clock
function, it exposes PLL VCO which could support up to 5GHz rate that
exceeds UINT32_MAX. So add assigned-clock-rates-u64 support
to set rate that exceeds UINT32_MAX.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/clk-conf.c | 42 +++++++++++++++++++++++++++++++++++++-----
 1 file changed, 37 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c
index 058420562020..51f994366d73 100644
--- a/drivers/clk/clk-conf.c
+++ b/drivers/clk/clk-conf.c
@@ -81,11 +81,44 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier)
 static int __set_clk_rates(struct device_node *node, bool clk_supplier)
 {
 	struct of_phandle_args clkspec;
-	int rc, index = 0;
+	int rc, count, count_64, index;
 	struct clk *clk;
-	u32 rate;
+	u64 *rates_64 __free(kfree) = NULL;
+	u32 *rates __free(kfree) = NULL;
+
+	count = of_property_count_u32_elems(node, "assigned-clock-rates");
+	count_64 = of_property_count_u64_elems(node, "assigned-clock-rates-u64");
+	if (count_64 > 0) {
+		count = count_64;
+		rates_64 = kcalloc(count, sizeof(*rates_64), GFP_KERNEL);
+		if (!rates_64)
+			return -ENOMEM;
+
+		rc = of_property_read_u64_array(node,
+						"assigned-clock-rates-u64",
+						rates_64, count);
+	} else if (count > 0) {
+		rates = kcalloc(count, sizeof(*rates), GFP_KERNEL);
+		if (!rates)
+			return -ENOMEM;
+
+		rc = of_property_read_u32_array(node, "assigned-clock-rates",
+						rates, count);
+	} else {
+		return 0;
+	}
+
+	if (rc)
+		return rc;
+
+	for (index = 0; index < count; index++) {
+		unsigned long rate;
+
+		if (rates_64)
+			rate = rates_64[index];
+		else
+			rate = rates[index];
 
-	of_property_for_each_u32(node, "assigned-clock-rates", rate) {
 		if (rate) {
 			rc = of_parse_phandle_with_args(node, "assigned-clocks",
 					"#clock-cells",	index, &clkspec);
@@ -112,12 +145,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier)
 
 			rc = clk_set_rate(clk, rate);
 			if (rc < 0)
-				pr_err("clk: couldn't set %s clk rate to %u (%d), current rate: %lu\n",
+				pr_err("clk: couldn't set %s clk rate to %lu (%d), current rate: %lu\n",
 				       __clk_get_name(clk), rate, rc,
 				       clk_get_rate(clk));
 			clk_put(clk);
 		}
-		index++;
 	}
 	return 0;
 }

-- 
2.37.1

Re: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-u64

[Stephen Boyd]

Quoting Peng Fan (OSS) (2024-08-04 05:32:56)
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX95 System Management Control Firmware(SCMI) manages the clock
> function, it exposes PLL VCO which could support up to 5GHz rate that
> exceeds UINT32_MAX. So add assigned-clock-rates-u64 support
> to set rate that exceeds UINT32_MAX.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/clk-conf.c | 42 +++++++++++++++++++++++++++++++++++++-----
>  1 file changed, 37 insertions(+), 5 deletions(-)

Thanks. I'd like to have a DT overlay KUnit test for this as well.
Either you can write it, or I'll write it next week.

RE: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-u64

[Peng Fan]

Hi Stephen,

> Subject: Re: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-
> u64
> 
> Quoting Peng Fan (OSS) (2024-08-04 05:32:56)
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > i.MX95 System Management Control Firmware(SCMI) manages the
> clock
> > function, it exposes PLL VCO which could support up to 5GHz rate
> that
> > exceeds UINT32_MAX. So add assigned-clock-rates-u64 support to
> set
> > rate that exceeds UINT32_MAX.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  drivers/clk/clk-conf.c | 42
> > +++++++++++++++++++++++++++++++++++++-----
> >  1 file changed, 37 insertions(+), 5 deletions(-)
> 
> Thanks. I'd like to have a DT overlay KUnit test for this as well.
> Either you can write it, or I'll write it next week.

I am new in writing KUnit test. If you would do that, that is
Great. Thanks in advance.

Thanks,
Peng.

Re: [PATCH v4 1/2] of: property: add of_property_for_each_u64

[Rob Herring (Arm)]

On Sun, 04 Aug 2024 20:32:55 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Preparing for assigned-clock-rates-u64 support, add function
> of_property_for_each_u64 to iterate each u64 value
> 
> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/of/property.c | 23 +++++++++++++++++++++++
>  include/linux/of.h    | 23 +++++++++++++++++++++++
>  2 files changed, 46 insertions(+)
> 

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Re: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-u64

[Stephen Boyd]

Quoting Peng Fan (OSS) (2024-08-04 05:32:56)
> From: Peng Fan <peng.fan@nxp.com>
> 
> i.MX95 System Management Control Firmware(SCMI) manages the clock
> function, it exposes PLL VCO which could support up to 5GHz rate that
> exceeds UINT32_MAX. So add assigned-clock-rates-u64 support
> to set rate that exceeds UINT32_MAX.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---

The patch doesn't compile because of missing slab.h include. I added it
and applied to clk-next.

RE: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-u64

[Peng Fan]

> Subject: Re: [PATCH v4 2/2] clk: clk-conf: support assigned-clock-rates-
> u64
> 
> Quoting Peng Fan (OSS) (2024-08-04 05:32:56)
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > i.MX95 System Management Control Firmware(SCMI) manages the
> clock
> > function, it exposes PLL VCO which could support up to 5GHz rate
> that
> > exceeds UINT32_MAX. So add assigned-clock-rates-u64 support to
> set
> > rate that exceeds UINT32_MAX.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> 
> The patch doesn't compile because of missing slab.h include. I added it
> and applied to clk-next.

I did not meet build issue for ARM64, but anyway thanks for helping
handle it.

Thanks,
Peng.