From: Christian Marangi <ansuelsmth@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Philipp Zabel <p.zabel@pengutronix.de>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [net-next RFC PATCH 2/2] net: mdio: Add MDIO bus controller for Airoha AN7583
Date: Wed, 28 May 2025 00:39:45 +0200 [thread overview]
Message-ID: <68363f34.050a0220.351f97.06f7@mx.google.com> (raw)
In-Reply-To: <e289d26e-9453-45f5-bfa6-f53f9e4647af@lunn.ch>
On Wed, May 28, 2025 at 12:36:46AM +0200, Andrew Lunn wrote:
> > +#define AN7583_MDIO_PHY 0xd4
> > +#define AN7583_MDIO1_SPEED_MODE BIT(11)
> > +#define AN7583_MDIO0_SPEED_MODE BIT(10)
>
> Is there any documentation about what these bits do? The bus should
> default to 2.5Mhz.
>
No but I can ask. In theory tho these MDIO controller are used for 10g
or 2.5g PHY that all require a firmware to load so 2.5MHz makes the boot
time of 2+ minute.
The documentation say...
1: fast mode
0: normal mode
Very useful I guess :D
--
Ansuel
next prev parent reply other threads:[~2025-05-27 22:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-27 21:34 [net-next RFC PATCH 1/2] dt-bindings: net: Document support for Airoha AN7583 MDIO Controller Christian Marangi
2025-05-27 21:34 ` [net-next RFC PATCH 2/2] net: mdio: Add MDIO bus controller for Airoha AN7583 Christian Marangi
2025-05-27 22:36 ` Andrew Lunn
2025-05-27 22:39 ` Christian Marangi [this message]
2025-05-27 23:18 ` Andrew Lunn
2025-06-05 19:52 ` [net-next RFC PATCH 1/2] dt-bindings: net: Document support for Airoha AN7583 MDIO Controller Rob Herring
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