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From: Heiko Stuebner <heiko@sntech.de>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org,
 linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
 Chukun Pan <amadeus@jmu.edu.cn>
Subject:
 Re: [PATCH v2 4/5] arm64: dts: rockchip: Enable USB 2.0 ports on ArmSoM Sige1
Date: Fri, 29 May 2026 00:12:33 +0200
Message-ID: <6849370.F8r316W7xa@phil>
In-Reply-To: <20260525070010.1060602-1-amadeus@jmu.edu.cn>
References:
 <20260505171208.3267387-5-heiko@sntech.de>
 <20260525070010.1060602-1-amadeus@jmu.edu.cn>
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Am Montag, 25. Mai 2026, 09:00:10 Mitteleurop=C3=A4ische Sommerzeit schrieb=
 Chukun Pan:
> Hi,
>=20
> > +&usb_host0_xhci {
> > +	extcon =3D <&usb2phy>;
> > +	maximum-speed =3D "high-speed";
> > +	phys =3D <&usb2phy_otg>;
> > +	phy-names =3D "usb2-phy";
>=20
> The same warning for this otg port:
> [    0.232211] dwc3 fe500000.usb: Configuration mismatch. dr_mode forced =
to host

According to the schematics, this is an actual Type-C port, so not really
sure what the controller or driver is doing there.

Could you possibly check which condition in
dwc3_get_dr_mode() in drivers/usb/dwc3/core.c is triggering this?


> > +&usb2phy_otg {
> > +	status =3D "okay";
> > +};
>=20
> OTG port missing: `vbus-supply =3D <&vcc5v0_usb_otg>;` [1]

I've added the supply now.


Thanks for testing
Heiko