From: <Conor.Dooley@microchip.com>
To: <guoren@kernel.org>, <heiko@sntech.de>
Cc: <paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
<aou@eecs.berkeley.edu>, <apatel@ventanamicro.com>,
<atishp@rivosinc.com>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/4] riscv: check for kernel config option in t-head memory types errata
Date: Fri, 2 Sep 2022 09:33:27 +0000 [thread overview]
Message-ID: <6865a605-2428-e6c2-09dc-aa2a66e48c55@microchip.com> (raw)
In-Reply-To: <CAJF2gTQsXMB+igwMiya-sqyku+3iQPop1JJuHwXtTToj163h-A@mail.gmail.com>
On 02/09/2022 02:06, Guo Ren wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Is it a Fixes?
Looks like one to me, seems a fixes tag would be good to
have here... Either way:
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
>
> On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@sntech.de> wrote:
>>
>> The t-head variant of page-based memory types should also check first
>> for the enabled kernel config option.
>>
>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> arch/riscv/errata/thead/errata.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
>> index a6f4bd8ccf3f..902e12452821 100644
>> --- a/arch/riscv/errata/thead/errata.c
>> +++ b/arch/riscv/errata/thead/errata.c
>> @@ -17,6 +17,9 @@
>> static bool errata_probe_pbmt(unsigned int stage,
>> unsigned long arch_id, unsigned long impid)
>> {
>> + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT))
>> + return false;
>> +
>> if (arch_id != 0 || impid != 0)
>> return false;
>>
>> --
>> 2.35.1
>>
>
>
> --
> Best Regards
> Guo Ren
next prev parent reply other threads:[~2022-09-02 9:33 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-01 22:27 [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing Heiko Stuebner
2022-09-01 22:27 ` [PATCH 2/4] riscv: drop some idefs from CMO initialization Heiko Stuebner
2022-09-02 1:05 ` Guo Ren
2022-09-02 9:34 ` Conor.Dooley
2022-09-02 9:49 ` Andrew Jones
2022-09-01 22:27 ` [PATCH 3/4] riscv: use BIT macros in t-head errata init Heiko Stuebner
2022-09-02 1:06 ` Guo Ren
2022-09-02 9:35 ` Conor.Dooley
2022-09-02 9:50 ` Andrew Jones
2022-09-01 22:27 ` [PATCH 4/4] riscv: check for kernel config option in t-head memory types errata Heiko Stuebner
2022-09-02 1:06 ` Guo Ren
2022-09-02 9:33 ` Conor.Dooley [this message]
2022-09-02 15:17 ` Heiko Stübner
2022-09-02 9:50 ` Andrew Jones
2022-09-02 1:07 ` [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing Guo Ren
2022-09-02 9:31 ` Conor.Dooley
2022-09-02 9:49 ` Andrew Jones
2022-09-02 15:12 ` Heiko Stübner
2022-09-02 15:26 ` Conor.Dooley
2022-09-02 15:34 ` Heiko Stübner
2022-09-02 19:29 ` Konstantin Ryabitsev
2022-09-02 9:50 ` Andrew Jones
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