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From: Samuel Holland <samuel.holland@sifive.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Anup Patel <apatel@ventanamicro.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>
Subject: Re: [PATCH v1 0/9] Fix Allwinner D1 boot regression
Date: Thu, 15 Aug 2024 08:32:13 -0500	[thread overview]
Message-ID: <686d61c4-e7ac-4dca-a7fd-decdd72e84d9@sifive.com> (raw)
In-Reply-To: <87plqalyd4.ffs@tglx>

Hi Thomas, Emil,

On 2024-08-15 8:16 AM, Thomas Gleixner wrote:
> On Thu, Aug 15 2024 at 05:14, Emil Renner Berthing wrote:
>> Emil Renner Berthing wrote:
>>> 6.11-rc3 + these reverts:  https://us01.z.antigena.com/l/Er4kZWDmvL5-bLzHHJoZv0k71iwW2jCD5qNpiz0x0XdYY6oORF_nXh7U7jw6oubhi~32HI4i71jUW9v8~NvSvPeUWrdYx3WJBr2GPDUjOu6LYPCOBfR2dVQuMWvlNj4tDjXFp3QEQAmeawZflD4JrIJjtSYIbKfe6v-tgH7SEuHMeSSriU633Lv 
>>> 6.11-rc3 + Samuel's patch: https://us01.z.antigena.com/l/EULtAYky6ZvgqZ49KGS-WBsYTg~Ht1NoQtEYmUVb56ymS9jDagqYHLK90WDjnVt69GfB4IX5NSRQXmSfkNsTzB8lJmFvDihHQmGrsCv9FzlorD9yGfXDlQ6rG6vmn5BNDwlipmssGaOGfh9yko8n9ArWR4TLhEf~f9ODqme~NXXwA9DLLc9p 
>>
>> I think this confirms what Charlie found here:
>> https://lore.kernel.org/linux-riscv/ZoydV7vad5JWIcZb@ghost/
> 
> Yes. So the riscv timer is not working on this thing or it stops
> somehow.

That's correct. With the (firmware) devicetree that Emil is using, the OpenSBI
firmware does not have a timer device, so it does not expose the (optional[1])
SBI time extension, and sbi_set_timer() does nothing.

I wrote a patch (not submitted) to skip registering riscv_clock_event when the
SBI time extension is unavailable, but this doesn't fully solve the issue
either, because then we have no clockevent at all when
check_unaligned_access_all_cpus() is called.

How early in the boot process are we "required" to have a functional clockevent?
Do we need to refactor check_unaligned_access_all_cpus() so it works on systems
where the only clockevent is provided by a platform device?

Regards,
Samuel

[1] https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/src/intro.adoc

> Can you apply the debug patch below and check whether you see the
> 'J: ....' output at all and if so whether it stops at some point.
> 
> Thanks,
> 
>         tglx
> 
> ---
> --- a/kernel/time/timer.c
> +++ b/kernel/time/timer.c
> @@ -2459,6 +2459,9 @@ static void run_local_timers(void)
>  {
>  	struct timer_base *base = this_cpu_ptr(&timer_bases[BASE_LOCAL]);
>  
> +	if (!(jiffies & 0xFF))
> +		pr_info("J: %lx\n", jiffies);
> +
>  	hrtimer_run_queues();
>  
>  	for (int i = 0; i < NR_BASES; i++, base++) {
> 
> 
> 
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
> 


  reply	other threads:[~2024-08-15 13:32 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-14 14:56 [PATCH v1 0/9] Fix Allwinner D1 boot regression Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 1/9] Revert "irqchip/sifive-plic: Chain to parent IRQ after handlers are ready" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 2/9] Revert "irqchip/sifive-plic: Avoid explicit cpumask allocation on stack" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 3/9] Revert "irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 4/9] Revert "irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe()" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 5/9] Revert "irqchip/sifive-plic: Cleanup PLIC contexts upon irqdomain creation failure" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 6/9] Revert "irqchip/sifive-plic: Use riscv_get_intc_hwnode() to get parent fwnode" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 7/9] Revert "irqchip/sifive-plic: Use devm_xyz() for managed allocation" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 8/9] Revert "irqchip/sifive-plic: Use dev_xyz() in-place of pr_xyz()" Emil Renner Berthing
2024-08-14 14:56 ` [PATCH v1 9/9] Revert "irqchip/sifive-plic: Convert PLIC driver into a platform driver" Emil Renner Berthing
2024-08-14 17:30 ` [PATCH v1 0/9] Fix Allwinner D1 boot regression Thomas Gleixner
2024-08-15 10:29   ` Emil Renner Berthing
2024-08-15 11:44     ` Thomas Gleixner
2024-08-15 12:04       ` Emil Renner Berthing
2024-08-15 12:14         ` Emil Renner Berthing
2024-08-15 13:16           ` Thomas Gleixner
2024-08-15 13:32             ` Samuel Holland [this message]
2024-08-15 14:11               ` Thomas Gleixner
2024-08-15 14:16                 ` Anup Patel
2024-08-15 14:41                   ` Samuel Holland
2024-08-15 15:07                     ` Emil Renner Berthing
2024-08-15 15:59                       ` Samuel Holland
2024-08-15 17:51                         ` Palmer Dabbelt
2024-08-15 18:04                           ` Thomas Gleixner
2024-08-16  6:13                           ` Icenowy Zheng
2024-08-15 15:14                     ` Thomas Gleixner
2024-08-15 14:30               ` Anup Patel
2024-08-15 15:03                 ` Samuel Holland
2024-08-15 15:53                   ` Anup Patel
2024-08-16  6:09                 ` Icenowy Zheng
2024-08-15 13:35             ` Emil Renner Berthing
2024-08-15 17:51   ` Palmer Dabbelt
2024-08-15 18:10     ` Thomas Gleixner
2024-08-15 23:04       ` Palmer Dabbelt
2024-08-16  6:15     ` Icenowy Zheng
2024-08-18 14:47 ` Palmer Dabbelt

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