From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29B4DCCA479 for ; Fri, 1 Jul 2022 13:03:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236730AbiGANDr (ORCPT ); Fri, 1 Jul 2022 09:03:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236519AbiGANDo (ORCPT ); Fri, 1 Jul 2022 09:03:44 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DFF04D164; Fri, 1 Jul 2022 06:03:42 -0700 (PDT) Received: from p508fd39e.dip0.t-ipconnect.de ([80.143.211.158] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1o7GJ5-0001Xm-Q1; Fri, 01 Jul 2022 15:03:35 +0200 From: Heiko Stuebner To: Chen-Yu Tsai , Jernej Skrabec , Linus Walleij , linux-arm-kernel@lists.infradead.org Cc: Samuel Holland , Krzysztof Kozlowski , Maxime Ripard , Ondrej Jirman , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Samuel Holland Subject: Re: [PATCH 2/6] pinctrl: sunxi: Add I/O bias setting for H6 R-PIO Date: Fri, 01 Jul 2022 15:03:35 +0200 Message-ID: <6931273.CvnuH1ECHv@phil> In-Reply-To: <20220626021148.56740-3-samuel@sholland.org> References: <20220626021148.56740-1-samuel@sholland.org> <20220626021148.56740-3-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Sonntag, 26. Juni 2022, 04:11:43 CEST schrieb Samuel Holland: > H6 requires I/O bias configuration on both of its PIO devices. > Previously it was only done for the main PIO. > > The setting for Port L is at bit 0, so the bank calculation needs to > account for the pin base. Otherwise the wrong bit is used. > > Fixes: cc62383fcebe ("pinctrl: sunxi: Support I/O bias voltage setting on H6") > Signed-off-by: Samuel Holland On a D1-Nezha Tested-by: Heiko Stuebner