From: <dan.j.williams@intel.com>
To: Alejandro Lucero Palau <alucerop@amd.com>,
<dan.j.williams@intel.com>,
"Koralahalli Channabasappa, Smita" <skoralah@amd.com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>,
<linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<nvdimm@lists.linux.dev>, <linux-fsdevel@vger.kernel.org>,
<linux-pm@vger.kernel.org>
Cc: Ard Biesheuvel <ardb@kernel.org>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
"Ira Weiny" <ira.weiny@intel.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Yazen Ghannam <yazen.ghannam@amd.com>,
Dave Jiang <dave.jiang@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Matthew Wilcox <willy@infradead.org>, Jan Kara <jack@suse.cz>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Len Brown <len.brown@intel.com>, Pavel Machek <pavel@kernel.org>,
Li Ming <ming.li@zohomail.com>,
Jeff Johnson <jeff.johnson@oss.qualcomm.com>,
"Ying Huang" <huang.ying.caritas@gmail.com>,
Yao Xingtao <yaoxt.fnst@fujitsu.com>,
Peter Zijlstra <peterz@infradead.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Nathan Fontenot <nathan.fontenot@amd.com>,
Terry Bowman <terry.bowman@amd.com>,
Robert Richter <rrichter@amd.com>,
Benjamin Cheatham <benjamin.cheatham@amd.com>,
Zhijian Li <lizhijian@fujitsu.com>,
Borislav Petkov <bp@alien8.de>,
Tomasz Wolski <tomasz.wolski@fujitsu.com>
Subject: Re: [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges
Date: Tue, 27 Jan 2026 15:41:55 -0800 [thread overview]
Message-ID: <69794d438629e_1d33100f3@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <f4bdf04d-7481-4282-b9da-ce5fcf911af9@amd.com>
Alejandro Lucero Palau wrote:
[..]
> I will take a look at this presentation, but I think there could be
> another option where accelerators information is obtained during pci
> enumeration by the kernel and using this information by this
> functionality skipping those ranges allocated to them. Forcing them to
> be compiled with the kernel would go against what distributions
> currently and widely do with initramfs. Not sure if some current "early"
> stubs could be used for this though but the information needs to be
> recollected before this code does the checks.
The simple path is "do not use EFI_MEMORY_SP for accelerator memory".
However, if the accelerator wants to publish memory as EFI_MEMORY_SP
then it needs to coordinate with the kernel's default behavior somehow.
That means expanding the list of drivers that dax_hmem needs to await
before it can make a determination, or teaching dax_hmem to look for a
secondary indication that it should never fall back to the default
behavior.
Talk to your AMD peers Paul and Rajneesh about their needs. I took it on
faith that the use case was required.
next prev parent reply other threads:[~2026-01-27 23:42 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 4:55 [PATCH v5 0/7] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM Smita Koralahalli
2026-01-22 4:55 ` [PATCH v5 1/7] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges Smita Koralahalli
2026-01-22 16:16 ` Jonathan Cameron
2026-01-22 4:55 ` [PATCH v5 2/7] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL Smita Koralahalli
2026-01-22 4:55 ` [PATCH v5 3/7] cxl/region: Skip decoder reset on detach for autodiscovered regions Smita Koralahalli
2026-01-22 16:18 ` Jonathan Cameron
2026-01-26 21:37 ` Koralahalli Channabasappa, Smita
2026-01-27 23:37 ` dan.j.williams
2026-01-28 15:39 ` Alejandro Lucero Palau
2026-01-28 21:24 ` dan.j.williams
2026-01-23 10:42 ` Alejandro Lucero Palau
2026-01-23 21:58 ` Dave Jiang
2026-01-22 4:55 ` [PATCH v5 4/7] cxl/region: Add helper to check Soft Reserved containment by CXL regions Smita Koralahalli
2026-01-22 16:25 ` Jonathan Cameron
2026-01-27 21:47 ` Koralahalli Channabasappa, Smita
2026-01-23 22:19 ` Dave Jiang
2026-01-25 3:30 ` Koralahalli Channabasappa, Smita
2026-01-27 21:59 ` dan.j.williams
2026-01-28 21:07 ` Koralahalli Channabasappa, Smita
2026-01-28 21:33 ` dan.j.williams
2026-01-22 4:55 ` [PATCH v5 5/7] dax: Introduce dax_cxl_mode for CXL coordination Smita Koralahalli
2026-01-22 16:33 ` Jonathan Cameron
2026-01-23 22:30 ` Dave Jiang
2026-01-27 20:03 ` Alison Schofield
2026-01-22 4:55 ` [PATCH v5 6/7] dax/hmem, cxl: Defer and resolve ownership of Soft Reserved memory ranges Smita Koralahalli
2026-01-22 13:40 ` kernel test robot
2026-01-23 5:30 ` kernel test robot
2026-01-23 6:35 ` Alison Schofield
2026-01-26 21:05 ` Koralahalli Channabasappa, Smita
2026-01-26 22:33 ` Alison Schofield
2026-01-27 21:45 ` Koralahalli Channabasappa, Smita
2026-01-29 0:45 ` dan.j.williams
2026-01-23 11:59 ` Alejandro Lucero Palau
2026-01-25 3:17 ` Koralahalli Channabasappa, Smita
2026-01-26 12:20 ` Alejandro Lucero Palau
2026-01-26 14:26 ` Alejandro Lucero Palau
2026-01-26 23:53 ` dan.j.williams
2026-01-27 12:16 ` Alejandro Lucero Palau
2025-10-01 17:15 ` Tomasz Wolski
2026-01-27 16:52 ` Alejandro Lucero Palau
2026-01-27 23:41 ` dan.j.williams [this message]
2026-01-28 16:19 ` Alejandro Lucero Palau
2026-01-27 21:29 ` Koralahalli Channabasappa, Smita
2026-01-23 22:55 ` Dave Jiang
2026-01-27 1:38 ` Alison Schofield
2026-01-28 21:14 ` Koralahalli Channabasappa, Smita
2026-01-28 21:47 ` Alison Schofield
2026-01-27 20:11 ` Alison Schofield
2026-01-28 23:35 ` dan.j.williams
2026-01-29 3:09 ` dan.j.williams
2026-01-29 21:20 ` Koralahalli Channabasappa, Smita
2026-01-29 22:01 ` dan.j.williams
2026-02-04 23:27 ` Tomasz Wolski
2026-01-22 4:55 ` [PATCH v5 7/7] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree Smita Koralahalli
2026-01-22 16:39 ` Jonathan Cameron
2026-01-28 22:07 ` Koralahalli Channabasappa, Smita
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