Re: [PATCH] cxl/hdm: Add support for 32 switch decoders

Li Ming
2026-03-19T11:11:54Z

在 2026/3/18 23:40, Dave Jiang 写道:
>
> On 3/18/26 6:00 AM, Li Ming wrote:
>> Per CXL r4.0 section 8.2.4.20.1. CXL host bridge and switch ports can
>> support 32 HDM decoders. Current implementation misses some decoders on
>> CXL host bridge and switch in the case that the value of Decoder Count
>> field in CXL HDM decoder Capability Register is greater than or equal to
>> 9.
>>
>> Update calculation implementation to ensure the decoder count calculation
>> is correct for CXL host bridge/switch ports.
>>
>> Signed-off-by: Li Ming <ming.li@zohomail.com>
>> ---
>> drivers/cxl/cxl.h | 7 ++++++-
>> 1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>> index 9b947286eb9b..466b8eeefed7 100644
>> --- a/drivers/cxl/cxl.h
>> +++ b/drivers/cxl/cxl.h
>> @@ -77,7 +77,12 @@ static inline int cxl_hdm_decoder_count(u32 cap_hdr)
>> {
>> int val = FIELD_GET(CXL_HDM_DECODER_COUNT_MASK, cap_hdr);
>>
>> - return val ? val * 2 : 1;
>> + if (!val)
>> + return 1;
>> + else if (val <= 8)
>> + return val * 2;
>> + else
>> + return 4 * (val - 4);
> That looks a bit messy. How about:
>
> switch (val) {
> case 0:
> return 1;
> case 1..8:
> return val * 2;
> case 9..12:
> return val 4 * (val - 4);
> default:
> return -ENXIO;
> }
>
> DJ

Sure, will do that in v2.

Ming