From: Quentin Schulz <quentin.schulz@cherry.de>
To: Jakob Unterwurzacher <jakobunt@gmail.com>,
linux-rockchip@lists.infradead.org
Cc: Heiko Stuebner <heiko@sntech.de>,
jakob.unterwurzacher@theobroma-systems.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: add attiny_rst_gate to Ringneck
Date: Thu, 26 Sep 2024 13:24:02 +0200 [thread overview]
Message-ID: <69f79284-b52e-496e-a286-d7e5ce3d90ce@cherry.de> (raw)
In-Reply-To: <20240201124427.279986-1-jakob.unterwurzacher@theobroma-systems.com>
Hi Jakob,
On 2/1/24 1:44 PM, Jakob Unterwurzacher wrote:
> Ringneck v1.4 can contain (placement option) an on-board ATtiny
> microcontroller instead of an STM32. In normal operation, this
> is transparent to the software, as both microcontrollers emulate
> the same ICs (amc6821 and isl1208).
>
> For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is
> used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if
> we are running on an older Ringneck revision, SWITCH_REG1 is not connected
> and has no effect.
>
> Add attiny-updi-gate-regulator so userspace can control it via sysfs:
>
> echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state
>
CONFIG_REGULATOR_USERSPACE_CONSUMER needs to be enabled for this to
work. Just putting this here as I had forgotten and was wondering why
this sysfs file wasn't available to me :)
> Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
I finally have access to some HW to test this, and therefore can give my:
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
> ---
> arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
> index dec29a75d361..1f7f4b2ea66a 100644
> --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
> @@ -15,6 +15,12 @@ aliases {
> rtc1 = &rk809;
> };
>
> + /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */
> + attiny-updi-gate-regulator {
> + compatible = "regulator-output";
> + vout-supply = <&vg_attiny_updi>;
> + };
> +
> emmc_pwrseq: emmc-pwrseq {
> compatible = "mmc-pwrseq-emmc";
> pinctrl-0 = <&emmc_reset>;
> @@ -146,6 +152,7 @@ rk809: pmic@20 {
> vcc5-supply = <&vcc_3v3>;
> vcc6-supply = <&vcc_3v3>;
> vcc7-supply = <&vcc_3v3>;
> + vcc8-supply = <&vcc5v0_sys>;
According to the schematics, vcc8 is routed to SWITCH_REG2 and not
SWITCH_REG1, which is fed vcc9. Even more so, vcc8 on the PMIC isn't
actually routed.
I therefore think we can simply remove this line here.
@Jakob, do you agree? Can you send a v2 if so?
Cheers,
Quentin
next prev parent reply other threads:[~2024-09-26 11:24 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-01 12:44 [PATCH] arm64: dts: rockchip: add attiny_rst_gate to Ringneck Jakob Unterwurzacher
2024-09-26 11:24 ` Quentin Schulz [this message]
2024-09-26 13:20 ` [PATCH v2] " Jakob Unterwurzacher
2024-09-26 13:24 ` Quentin Schulz
2024-09-27 9:39 ` Heiko Stuebner
2024-09-27 9:50 ` Quentin Schulz
2024-09-27 14:48 ` Heiko Stuebner
2024-09-30 10:55 ` Heiko Stuebner
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