From: Sachin Gupta <sachin.gupta@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
Imran Shaik <imran.shaik@oss.qualcomm.com>,
Taniya Das <taniya.das@oss.qualcomm.com>,
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>,
Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Sachin Gupta <sachin.gupta@oss.qualcomm.com>
Subject: [PATCH 2/2] arm64: dts: qcom: monaco-pmics: Enable PMIC MBG thermal monitor
Date: Fri, 14 Aug 2026 15:21:26 +0530 [thread overview]
Message-ID: <6a7ee53d.797536ea.65c65.2a09@mx.google.com> (raw)
Monaco boards use PM8620AU PMIC instances that expose MBG thermal monitor
blocks handled by the existing qcom-spmi-mbg-tm driver.
Add MBG temperature-sensor nodes for the PMIC instances and wire them into
dedicated thermal zones with passive trips, so PMIC die temperature
monitoring is available through the thermal framework.
Signed-off-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/monaco-pmics.dtsi | 62 ++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi b/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi
index 6e096b9b7546..361f5163b6d9 100644
--- a/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco-pmics.dtsi
@@ -7,6 +7,36 @@
#include <dt-bindings/spmi/spmi.h>
#include "qcom-adc5-gen3.h"
+/ {
+ thermal-zones {
+ pm8775-mbg0-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&pmm8620au_0_mbg_temp>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+
+ pm8775-mbg1-thermal {
+ polling-delay-passive = <100>;
+ thermal-sensors = <&pmm8620au_1_mbg_temp>;
+
+ trips {
+ trip0 {
+ temperature = <115000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ };
+ };
+};
+
&spmi_bus {
pmm8620au_0: pmic@0 {
compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
@@ -53,6 +83,22 @@ pmm8620au_0_gpios: gpio@8800 {
};
};
+ pmm8620au_sail_0: pmic@1 {
+ compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmm8620au_0_mbg_temp: temperature-sensor@d700 {
+ compatible = "qcom,pm8775-mbg-tm";
+ reg = <0xd700>;
+ io-channels = <&pmm8620au_0_adc ADC5_GEN3_DIE_TEMP(0)>;
+ io-channel-names = "thermal";
+ interrupts-extended = <&spmi_bus 0x1 0xd7 0x0 IRQ_TYPE_EDGE_RISING>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
+
pmm8650au_1: pmic@2 {
compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
reg = <0x2 SPMI_USID>;
@@ -90,4 +136,20 @@ pmm8650au_1_gpios: gpio@8800 {
#interrupt-cells = <2>;
};
};
+
+ pmm8620au_sail_1: pmic@3 {
+ compatible = "qcom,pmm8654au", "qcom,spmi-pmic";
+ reg = <0x3 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmm8620au_1_mbg_temp: temperature-sensor@d700 {
+ compatible = "qcom,pm8775-mbg-tm";
+ reg = <0xd700>;
+ io-channels = <&pmm8650au_1_adc ADC5_GEN3_DIE_TEMP(2)>;
+ io-channel-names = "thermal";
+ interrupts-extended = <&spmi_bus 0x3 0xd7 0x0 IRQ_TYPE_EDGE_RISING>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
};
--
2.34.1
reply other threads:[~2026-08-14 9:52 UTC|newest]
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