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From: Florian Eckert <fe@dev.tdt.de>
To: Thomas Gleixner <tglx@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Eckert.Florian@googlemail.com, ms@dev.tdt.de,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Subject: Re: [PATCH 2/2] irqchip: Add Lightning Mountain irqchip support
Date: Mon, 23 Mar 2026 13:14:41 +0100	[thread overview]
Message-ID: <6b059429a3db61dffd53a280dc2d6278@dev.tdt.de> (raw)
In-Reply-To: <87v7eqk8pv.ffs@tglx>

Hello Thomas,

>> +
>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +	if (!res)
>> +		return -EINVAL;
>> +
>> +	mdev->base = devm_ioremap_resource(&pdev->dev, res);
>> +	if (IS_ERR(mdev->base)) {
>> +		dev_err(&pdev->dev, "failed to ioremap %pR\n", res);
>> +		return PTR_ERR(mdev->base);
>> +	}
>> +
>> +	domain = irq_domain_create_hierarchy(x86_vector_domain, 0,
> 
> So this is hardwired to the vector domain and does not allow the
> interrupts to be remapped? Those SoCs have VT-x which implies interrupt
> remapping support. But what do I know about the infinite wisdom of
> hardware designers.
> 
> TBH, if they decided to hardwire it to the vector domain, then they are
> begging for a cluebat treatment.

Unfortunately, I don’t have a detailed hardware description for this
IP block. All I have from the Maxlinear is this driver [1] from
their SDK.

> Let me summarize what I can crystal-ball out of your comprehensive
> change log and the insane amount of comments in the code:
> 
>     1) The IP block converts 'wired' interrupts to MSI messages
> 
>     2) It needs to route four interrupts as NMI
> 
> Right?

It has a total of 64 IRQs. Four of these are connected to the
individual CPU cores as NMIs.

> #1 The implementation gets the MSI interrupt domain concept completely
>    wrong
> 
>    X86 uses the MSI parent domain concept.
> 
>    [vector domain] -- [remap domain] -- [ device domain]
> 
>    The remap domain is optional, but both the vector domain and the
>    remap domain act as MSI parent domains.
> 
>    So what you want to create for that chip is a MSI device domain and
>    that domain needs to set the bus token to DOMAIN_BUS_WIRED_TO_MSI.
> 
>    See drivers/irqchip/irq-mbigen.c mbigen_create_device_domain() and
>    related code as an example for a proper wired to MSI implementation.

Thanks for pointing that out. I’ll take a closer look at it this.

> #2 NMI routing
> 
>    There has been attempts to implement that before in a clean way. The
>    patch set dried out, but the underlying changes for NMI support are
>    still valid and Ricardo (CC'ed) is working on them again, IIRC. See:
> 
> 
> https://lore.kernel.org/lkml/20230301234753.28582-1-ricardo.neri-calderon@linux.intel.com/

The v7 is already about two years old – let’s see if there’s anything
else coming.

All in all, thank you for taking the time to look at this. I’ll go back
to the drawing board and have another closer look at it.

Thanks *all* for your feedback.

Best regards

Florian

[1] 
https://github.com/maxlinear/linux/blob/updk_9.1.90/drivers/irqchip/irq-intel-soc-msi.c

  reply	other threads:[~2026-03-23 12:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 13:10 [PATCH 0/2] Add MSI driver support for the Lightning Mountain SoC Florian Eckert
2026-03-18 13:10 ` [PATCH 1/2] dt-bindings: Add Lightning Mountain MSI interrupt controller bindings Florian Eckert
2026-03-18 14:46   ` Rob Herring (Arm)
2026-03-18 22:52   ` Rob Herring
2026-03-19 11:01   ` Krzysztof Kozlowski
2026-03-18 13:10 ` [PATCH 2/2] irqchip: Add Lightning Mountain irqchip support Florian Eckert
2026-03-19  9:03   ` kernel test robot
2026-03-19 10:41   ` kernel test robot
2026-03-19 11:44   ` kernel test robot
2026-03-20 12:04   ` Thomas Gleixner
2026-03-23 12:14     ` Florian Eckert [this message]
2026-03-23 12:28       ` Ricardo Neri
2026-03-23 21:15       ` Thomas Gleixner

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