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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3ece247e117sm10792562b6e.14.2025.01.07.15.40.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jan 2025 15:40:55 -0800 (PST) Message-ID: <6b60de31-4bbb-4a94-a62b-63ccbacdf1b4@baylibre.com> Date: Tue, 7 Jan 2025 17:40:53 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 07/15] iio: adc: ad7768-1: Add reset gpio To: Jonathan Santos , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sergiu Cuciurean , lars@metafoo.de, Michael.Hennerich@analog.com, jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, marcelo.schmitt1@gmail.com References: <45cfd15501384a183a97d871b6848fb79fdb7b39.1736201898.git.Jonathan.Santos@analog.com> From: David Lechner Content-Language: en-US In-Reply-To: <45cfd15501384a183a97d871b6848fb79fdb7b39.1736201898.git.Jonathan.Santos@analog.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 1/7/25 9:25 AM, Jonathan Santos wrote: > From: Sergiu Cuciurean > > Depending on the controller, the default state of a gpio can vary. This > change excludes the probability that the dafult state of the ADC reset > gpio will be HIGH if it will be passed as reference in the deivcetree. > > Signed-off-by: Sergiu Cuciurean > --- > drivers/iio/adc/ad7768-1.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c > index 881446462ff5..f73b9aec8b0f 100644 > --- a/drivers/iio/adc/ad7768-1.c > +++ b/drivers/iio/adc/ad7768-1.c > @@ -161,6 +161,7 @@ struct ad7768_state { > struct completion completion; > struct iio_trigger *trig; > struct gpio_desc *gpio_sync_in; > + struct gpio_desc *gpio_reset; > const char *labels[ARRAY_SIZE(ad7768_channels)]; > /* > * DMA (thus cache coherency maintenance) may require the > @@ -441,6 +442,18 @@ static int ad7768_setup(struct ad7768_state *st) > { > int ret; > > + st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset", > + GPIOD_OUT_LOW); Could be simplified by setting this to GPIOD_OUT_HIGH and drop gpiod_direction_output(st->gpio_reset, 1); > + if (IS_ERR(st->gpio_reset)) > + return PTR_ERR(st->gpio_reset); > + > + if (st->gpio_reset) { > + gpiod_direction_output(st->gpio_reset, 1); > + usleep_range(10, 15); > + gpiod_direction_output(st->gpio_reset, 0); > + usleep_range(10, 15); prefer fsleep() > + } > + We can move the code below in an else since we don't need to do 2 resets. > /* > * Two writes to the SPI_RESET[1:0] bits are required to initiate > * a software reset. The bits must first be set to 11, and then