From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB8633F54B1 for ; Thu, 7 May 2026 13:28:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778160485; cv=none; b=dbg4HdlSYKjJHWbJD0e9nz0L5YClzMAbyCWTUnPZBRVwlSd3znp39sQbAwNuQeL/kSjB1BPnMWxmLeOHI7TF7nPUKHJmD0ySC8gJhwieYwW5mkkB/mRFUKR9nioh+ud+1ziGA8FtN6LjbV5d582DUhwCxsbiD2SWq05Za8pycbM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778160485; c=relaxed/simple; bh=GUGxPoO5R7lonFmB6Rui3l22EEGIexu+OW62yr5eVbU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=YmDER7Wqnsu/qOu2Erwfv/zoQNYb3TESOOA7+GT6Wfi1UFepnh8m7VDmvJo6BKuzEZGbWC6UHucMrBXwSnO1P1ZW5s9IRT09WRNYenud07G5pwVrrNLdY91qbvCRi/P6xVfsfEc0N7IkE97a3AxKwmv7HVw4M5tdQwJ5FtOE8ic= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=REcujGCO; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="REcujGCO" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-43d64313c39so675886f8f.3 for ; Thu, 07 May 2026 06:28:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778160481; x=1778765281; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=E/1d4MNXx8F6WoIg+pWhQR6lyz8UlfDfaD1LAFn90c8=; b=REcujGCOOFYxYxcvSAzGBJmWqrzOCr/Kto/NJGmNUzl8VVLg8OR9a7hpTHC5H/o2VE tfoeNAzoJi2zUrrJ1dtJEzkjXooUCU53tibAnd9zZ4VDTFpBEQgu9j1GTs9qND6Lfs1+ bctaZET7KD70gmkust0+0PTU6x5BM86Z/4znb58MzqbTXwzDAZ7qbptbJr2axAELKmOy Gk/OSwTCGH9HWO6FQfoKTRsGC5S3DNzJ0GGGA+uknkuJrfzMO4AWqe1u9Sz6oSopSL6f hVyu7jRPtnN2WFiQgdKYzlcCoUIQcCwQsqRdqUR2UhYycB+hQoK774xyuRKTl9Yav+MU /UjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778160481; x=1778765281; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=E/1d4MNXx8F6WoIg+pWhQR6lyz8UlfDfaD1LAFn90c8=; b=LQI5nYblN4h7md55sBT0cpyzZNxoPz0eYGY8AxaoUL7QwEP8Q5mLwZWNbwsMhkCRtI r0esAi6V6HVfWgfXioLY2DkKXQMiR97TqKt8hlOvV7dSmewuqPJ2A9lkfCRTOvPC+em1 n7mAD9UORhGEp/fyW+psW/6JL8zm/1qMSjQKlpK5KFv9V1TxLR3mMpawTJHf+Ml6L7k6 THiMXm4UkPZw2LuPotP405zTdWLujBgjlct8aei86lObrzwxecJA4jdMh3dIf28bcNwA ZCuQ3J6wKxfYagnEMTy1r2J8XPA7TeGrhJSYjDY4ri+sUGkKUSpdG1+7DAQPGjnKzH79 LQIw== X-Forwarded-Encrypted: i=1; AFNElJ+CmO6Mt+wRx9wX0+DBlZra194CuHw+Ggn1i//cH1UcmSP8AxVOLdIXZsUJKOJYQusVVkFV0mOujQn566M=@vger.kernel.org X-Gm-Message-State: AOJu0YyB+sK6AnoasUVxo+SDmuN5mYRTR2KhwHv9Yrr5Q9X1kVeDOnsI rE2YNhmpIsi2XfuCuO+QPmGfgoagk8RYgn9NUgilAt4S3o3lZa6kfNU= X-Gm-Gg: AeBDieu+oRGjGo8AO403qXpck1xvyXGMM9SZ4ZNo84zguRYM0r2wgOMYOrouC9CQX4N KHU1AH68moEY4El8LUia+7nMWl79nNCZhlzcCZsYAft54faaYNFNJFrq24sYOAWk2dn6Sspq8Er tnhiByyRFaYcyB0bpYGmIPGKsahiXKS30nRhn+eeJtRiapvNjmgCg/Fvff19fOsfqBvZYpdLhO0 1EaVyQTqP5rputxBIOl1ga1VLDw/o+w53batlP6rNP1lbuwKGwhcpoL2VJ2F622fypSpxzZAo4j 0WBqSDn4sBOL5ru84EjmYlnUJFJwuQ1aAUgX+O7mxOFilTG60G1s+raYvMPaW9D+SSrcTfcaUAC hTDR/UVR4hZt5NC5TnguLG8NUscDOdN8WnLICuP91zz5lYh5vC4JHQru+YI/Jk5MeF650yVbmP7 1WI+1NlQSagLzl0/XoDD7Gw6EM4N6Ksvc/C2rBoZCgLOGC5pT6wM4y3cYUsc2YT5qjbMjCK+SUC okJ4mn1DnXQKH1kcyuNKvqvYbs3pA== X-Received: by 2002:a5d:588b:0:b0:44b:7ec9:2d76 with SMTP id ffacd0b85a97d-4515b056d5fmr14170290f8f.7.1778160480564; Thu, 07 May 2026 06:28:00 -0700 (PDT) Received: from [192.168.1.17] (host-79-50-55-97.retail.telecomitalia.it. [79.50.55.97]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45055e2d3d0sm20037129f8f.34.2026.05.07.06.27.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 07 May 2026 06:28:00 -0700 (PDT) Message-ID: <6cc62409-9ca5-4db1-9526-65dd8b88981c@gmail.com> Date: Thu, 7 May 2026 15:27:58 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] iommu: arm-smmu-qcom: Ensure smmu is powered up in set_ttbr0_cfg To: Xilin Wu , Rob Clark , Will Deacon , Robin Murphy , Joerg Roedel Cc: iommu@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260325-qcom_smmu_pmfix-v2-1-ba769a6ad0be@gmail.com> <330D3C56EBC6D08F+3d956321-39de-4308-a977-ad8f7101ed92@radxa.com> Content-Language: en-US From: Anna Maniscalco In-Reply-To: <330D3C56EBC6D08F+3d956321-39de-4308-a977-ad8f7101ed92@radxa.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 5/7/26 10:21 AM, Xilin Wu wrote: > On 3/26/2026 5:11 AM, Anna Maniscalco wrote: >> Previously the device was being accessed while potentially in a >> suspended state. >> >> Signed-off-by: Anna Maniscalco >> --- >> Changes in v2: >> - Simplify patch by acquiring device just around the call that needs it >> - Link to v1: >> https://lore.kernel.org/r/20260210-qcom_smmu_pmfix-v1-1-78b7143ac053@gmail.com >> --- >>   drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 9 +++++++++ >>   1 file changed, 9 insertions(+) >> >> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> index 573085349df3..cab7d110aaf5 100644 >> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c >> @@ -231,6 +231,7 @@ static int qcom_adreno_smmu_set_ttbr0_cfg(const >> void *cookie, >>       struct io_pgtable *pgtable = >> io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops); >>       struct arm_smmu_cfg *cfg = &smmu_domain->cfg; >>       struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx]; >> +    int ret; >>         /* The domain must have split pagetables already enabled */ >>       if (cb->tcr[0] & ARM_SMMU_TCR_EPD1) >> @@ -260,8 +261,16 @@ static int qcom_adreno_smmu_set_ttbr0_cfg(const >> void *cookie, >>           cb->ttbr[0] |= FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid); >>       } >>   +    ret = pm_runtime_resume_and_get(smmu_domain->smmu->dev); >> +    if (ret < 0) { >> +        dev_err(smmu_domain->smmu->dev, "failed to get runtime PM: >> %d\n", ret); >> +        return -ENODEV; >> +    } >> + >>       arm_smmu_write_context_bank(smmu_domain->smmu, cb->cfg->cbndx); >>   +    pm_runtime_put_autosuspend(smmu_domain->smmu->dev); >> + >>       return 0; >>   } >> >> --- >> base-commit: 50c4a49f7292b33b454ea1a16c4f77d6965405dc >> change-id: 20260210-qcom_smmu_pmfix-2aead2ba4e20 >> >> Best regards, > > May I ask what is the status of this patch? Without this patch, I can > trigger a crash easily on sc8280xp by running fastfetch multiple times. It's ready on my side so if someone could review I think it could be merged. > > Tested-by: Xilin Wu # sc8280xp-radxa-dragon-q8b > Best regards, -- Anna Maniscalco