From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: "Nishanth Menon" <nm@ti.com>,
"Santosh Shilimkar" <ssantosh@kernel.org>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Tero Kristo" <kristo@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
"Siddharth Vadapalli" <s-vadapalli@ti.com>,
"Bao Cheng Su" <baocheng.su@siemens.com>,
"Hua Qian Li" <huaqian.li@siemens.com>,
"Diogo Ivo" <diogo.ivo@siemens.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH v4 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU
Date: Wed, 4 Sep 2024 15:46:56 +0530 [thread overview]
Message-ID: <6d722868-271a-485b-a7af-e2449adc83ca@ti.com> (raw)
In-Reply-To: <28d31a14fe9cc1867f023ebaddd6074459d15e40.1725444016.git.jan.kiszka@siemens.com>
On Wed, Sep 04, 2024 at 12:00:11PM +0200, Jan Kiszka wrote:
> From: Jan Kiszka <jan.kiszka@siemens.com>
>
> The PVU on the AM65 SoC is capable of restricting DMA from PCIe devices
> to specific regions of host memory. Add the optional property
> "memory-regions" to point to such regions of memory when PVU is used.
>
> Since the PVU deals with system physical addresses, utilizing the PVU
> with PCIe devices also requires setting up the VMAP registers to map the
> Requester ID of the PCIe device to the CBA Virtual ID, which in turn is
> mapped to the system physical address. Hence, describe the VMAP
> registers which are optionally unless the PVU shall used for PCIe.
The last line above seems to be accidentally modified when compared to
the one at:
https://lore.kernel.org/r/ada462d5-157a-4e11-ba25-d412a2bb678f@ti.com/
"Hence, describe the VMAP registers which are optionally
configured whenever PVU is used for PCIe."
If you intended to modify it, then the sentence appears distorted.
Regards,
Siddharth.
next prev parent reply other threads:[~2024-09-04 10:17 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-04 10:00 [PATCH v4 0/7] soc: ti: Add and use PVU on K3-AM65 for DMA isolation Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 1/7] dt-bindings: soc: ti: Add AM65 peripheral virtualization unit Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 2/7] dt-bindings: PCI: ti,am65: Extend for use with PVU Jan Kiszka
2024-09-04 10:16 ` Siddharth Vadapalli [this message]
2024-09-04 11:47 ` Jan Kiszka
2024-09-05 6:32 ` Krzysztof Kozlowski
2024-09-05 6:40 ` Jan Kiszka
2024-09-05 6:53 ` Krzysztof Kozlowski
2024-09-05 7:15 ` Jan Kiszka
2024-09-05 7:50 ` Krzysztof Kozlowski
2024-09-05 7:56 ` Krzysztof Kozlowski
2024-09-06 7:00 ` Jan Kiszka
2024-09-05 6:57 ` Krzysztof Kozlowski
2024-09-05 7:16 ` Jan Kiszka
2024-09-05 7:52 ` Krzysztof Kozlowski
2024-09-06 7:13 ` Jan Kiszka
2024-09-05 16:37 ` Bjorn Helgaas
2024-09-04 10:00 ` [PATCH v4 3/7] soc: ti: Add IOMPU-like PVU driver Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 4/7] PCI: keystone: Add supported for PVU-based DMA isolation on AM654 Jan Kiszka
2024-09-05 16:33 ` Bjorn Helgaas
2024-09-05 19:07 ` Jan Kiszka
2024-09-05 19:16 ` Bjorn Helgaas
2024-09-06 6:24 ` Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 5/7] arm64: dts: ti: k3-am65-main: Add PVU nodes Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 6/7] arm64: dts: ti: k3-am65-main: Add VMAP registers to PCI root complexes Jan Kiszka
2024-09-04 10:00 ` [PATCH v4 7/7] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC on Advanced Jan Kiszka
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