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Bae" , seanjc@google.com Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, chao.gao@intel.com References: <20260428050111.39323-1-chang.seok.bae@intel.com> <20260428050111.39323-2-chang.seok.bae@intel.com> From: Paolo Bonzini Content-Language: en-US Autocrypt: addr=pbonzini@redhat.com; keydata= xsEhBFRCcBIBDqDGsz4K0zZun3jh+U6Z9wNGLKQ0kSFyjN38gMqU1SfP+TUNQepFHb/Gc0E2 CxXPkIBTvYY+ZPkoTh5xF9oS1jqI8iRLzouzF8yXs3QjQIZ2SfuCxSVwlV65jotcjD2FTN04 hVopm9llFijNZpVIOGUTqzM4U55sdsCcZUluWM6x4HSOdw5F5Utxfp1wOjD/v92Lrax0hjiX DResHSt48q+8FrZzY+AUbkUS+Jm34qjswdrgsC5uxeVcLkBgWLmov2kMaMROT0YmFY6A3m1S P/kXmHDXxhe23gKb3dgwxUTpENDBGcfEzrzilWueOeUWiOcWuFOed/C3SyijBx3Av/lbCsHU Vx6pMycNTdzU1BuAroB+Y3mNEuW56Yd44jlInzG2UOwt9XjjdKkJZ1g0P9dwptwLEgTEd3Fo UdhAQyRXGYO8oROiuh+RZ1lXp6AQ4ZjoyH8WLfTLf5g1EKCTc4C1sy1vQSdzIRu3rBIjAvnC tGZADei1IExLqB3uzXKzZ1BZ+Z8hnt2og9hb7H0y8diYfEk2w3R7wEr+Ehk5NQsT2MPI2QBd wEv1/Aj1DgUHZAHzG1QN9S8wNWQ6K9DqHZTBnI1hUlkp22zCSHK/6FwUCuYp1zcAEQEAAc0j UGFvbG8gQm9uemluaSA8cGJvbnppbmlAcmVkaGF0LmNvbT7CwU0EEwECACMFAlRCcBICGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRB+FRAMzTZpsbceDp9IIN6BIA0Ol7MoB15E 11kRz/ewzryFY54tQlMnd4xxfH8MTQ/mm9I482YoSwPMdcWFAKnUX6Yo30tbLiNB8hzaHeRj jx12K+ptqYbg+cevgOtbLAlL9kNgLLcsGqC2829jBCUTVeMSZDrzS97ole/YEez2qFpPnTV0 VrRWClWVfYh+JfzpXmgyhbkuwUxNFk421s4Ajp3d8nPPFUGgBG5HOxzkAm7xb1cjAuJ+oi/K CHfkuN+fLZl/u3E/fw7vvOESApLU5o0icVXeakfSz0LsygEnekDbxPnE5af/9FEkXJD5EoYG SEahaEtgNrR4qsyxyAGYgZlS70vkSSYJ+iT2rrwEiDlo31MzRo6Ba2FfHBSJ7lcYdPT7bbk9 AO3hlNMhNdUhoQv7M5HsnqZ6unvSHOKmReNaS9egAGdRN0/GPDWr9wroyJ65ZNQsHl9nXBqE AukZNr5oJO5vxrYiAuuTSd6UI/xFkjtkzltG3mw5ao2bBpk/V/YuePrJsnPFHG7NhizrxttB nTuOSCMo45pfHQ+XYd5K1+Cv/NzZFNWscm5htJ0HznY+oOsZvHTyGz3v91pn51dkRYN0otqr bQ4tlFFuVjArBZcapSIe6NV8C4cEiSTOwE0EVEJx7gEIAMeHcVzuv2bp9HlWDp6+RkZe+vtl KwAHplb/WH59j2wyG8V6i33+6MlSSJMOFnYUCCL77bucx9uImI5nX24PIlqT+zasVEEVGSRF m8dgkcJDB7Tps0IkNrUi4yof3B3shR+vMY3i3Ip0e41zKx0CvlAhMOo6otaHmcxr35sWq1Jk tLkbn3wG+fPQCVudJJECvVQ//UAthSSEklA50QtD2sBkmQ14ZryEyTHQ+E42K3j2IUmOLriF dNr9NvE1QGmGyIcbw2NIVEBOK/GWxkS5+dmxM2iD4Jdaf2nSn3jlHjEXoPwpMs0KZsgdU0pP JQzMUMwmB1wM8JxovFlPYrhNT9MAEQEAAcLBMwQYAQIACQUCVEJx7gIbDAAKCRB+FRAMzTZp sadRDqCctLmYICZu4GSnie4lKXl+HqlLanpVMOoFNnWs9oRP47MbE2wv8OaYh5pNR9VVgyhD OG0AU7oidG36OeUlrFDTfnPYYSF/mPCxHttosyt8O5kabxnIPv2URuAxDByz+iVbL+RjKaGM GDph56ZTswlx75nZVtIukqzLAQ5fa8OALSGum0cFi4ptZUOhDNz1onz61klD6z3MODi0sBZN Aj6guB2L/+2ZwElZEeRBERRd/uommlYuToAXfNRdUwrwl9gRMiA0WSyTb190zneRRDfpSK5d usXnM/O+kr3Dm+Ui+UioPf6wgbn3T0o6I5BhVhs4h4hWmIW7iNhPjX1iybXfmb1gAFfjtHfL xRUr64svXpyfJMScIQtBAm0ihWPltXkyITA92ngCmPdHa6M1hMh4RDX+Jf1fiWubzp1voAg0 JBrdmNZSQDz0iKmSrx8xkoXYfA3bgtFN8WJH2xgFL28XnqY4M6dLhJwV3z08tPSRqYFm4NMP dRsn0/7oymhneL8RthIvjDDQ5ktUjMe8LtHr70OZE/TT88qvEdhiIVUogHdo4qBrk41+gGQh b906Dudw5YhTJFU3nC6bbF2nrLlB4C/XSiH76ZvqzV0Z/cAMBo5NF/w= In-Reply-To: <20260428050111.39323-2-chang.seok.bae@intel.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 On 4/28/26 07:00, Chang S. Bae wrote: > mov VCPU_RBP(%_ASM_DI), %_ASM_BP > mov VCPU_RSI(%_ASM_DI), %_ASM_SI > #ifdef CONFIG_X86_64 > - mov VCPU_R8 (%_ASM_DI), %r8 > - mov VCPU_R9 (%_ASM_DI), %r9 > - mov VCPU_R10(%_ASM_DI), %r10 > - mov VCPU_R11(%_ASM_DI), %r11 > - mov VCPU_R12(%_ASM_DI), %r12 > - mov VCPU_R13(%_ASM_DI), %r13 > - mov VCPU_R14(%_ASM_DI), %r14 > - mov VCPU_R15(%_ASM_DI), %r15 > + VMX_LOAD_REGS %_ASM_DI, 8,9,10,11,12,13,14,15 Please pass in VMX_vcpu_arch_regs so that you can use the same macro for Intel and AMD, similar to the SPEC_CTRL macros. I would also consider using inst.h's name-to-index conversion: .macro LOAD_GPRS src:req, regs_ofs:req, regs:vararg .irp reg, \regs #ifdef CONFIG_X86_64 R64_NUM reg_num \reg #else R32_NUM reg_num \reg #endif .if \reg_num <> REG_NUM_INVALID mov (\regs_ofs + \reg_num * WORD_SIZE)(%_ASM_DI), \reg .else .err invalid register \reg .endif .endr .endm LOAD_GPRS %_ASM_DI, VMX_vcpu_arch_regs, \ %_ASM_AX, %_ASM_CX, %_ASM_DX, %_ASM_BX, %_ASM_BP, %_ASM_SI #ifdef CONFIG_X86_64 LOAD_GPRS %_ASM_DI, VMX_vcpu_arch_regs, \ %r8, %r9, %r10, %r11, %r12, %r13, %r14, %r15 #endif /* Load guest RDI. This kills the @vmx pointer! */ LOAD_GPRS %_ASM_DI, VMX_vcpu_arch_regs, %_ASM_DI (same for STORE_GPRS). Note however that inst.h is currently dead code, so it would have to move into arch/x86/kvm/ as in the patch after my signature. Paolo diff --git a/arch/x86/include/asm/inst.h b/arch/x86/kvm/inst.h similarity index 66% rename from arch/x86/include/asm/inst.h rename to arch/x86/kvm/inst.h index e48a00b3311d..95ca0826effd 100644 --- a/arch/x86/include/asm/inst.h +++ b/arch/x86/kvm/inst.h @@ -1,19 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Generate .byte code for some instructions not supported by old - * binutils. + * Convert register names to their sizes and the indices used when + * encoding instructions. */ -#ifndef X86_ASM_INST_H -#define X86_ASM_INST_H +#ifndef X86_KVM_INST_H +#define X86_KVM_INST_H #ifdef __ASSEMBLER__ #define REG_NUM_INVALID 100 -#define REG_TYPE_R32 0 -#define REG_TYPE_R64 1 -#define REG_TYPE_INVALID 100 - .macro R32_NUM opd r32 \opd = REG_NUM_INVALID .ifc \r32,%eax @@ -121,28 +114,6 @@ .endif #endif .endm - - .macro REG_TYPE type reg - R32_NUM reg_type_r32 \reg - R64_NUM reg_type_r64 \reg - .if reg_type_r64 <> REG_NUM_INVALID - \type = REG_TYPE_R64 - .elseif reg_type_r32 <> REG_NUM_INVALID - \type = REG_TYPE_R32 - .else - \type = REG_TYPE_INVALID - .endif - .endm - - .macro PFX_REX opd1 opd2 W=0 - .if ((\opd1 | \opd2) & 8) || \W - .byte 0x40 | ((\opd1 & 8) >> 3) | ((\opd2 & 8) >> 1) | (\W << 3) - .endif - .endm - - .macro MODRM mod opd1 opd2 - .byte \mod | (\opd1 & 7) | ((\opd2 & 7) << 3) - .endm #endif #endif