From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3FD31C433FE for ; Mon, 7 Nov 2022 09:33:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231653AbiKGJdl (ORCPT ); Mon, 7 Nov 2022 04:33:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58628 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231672AbiKGJd0 (ORCPT ); Mon, 7 Nov 2022 04:33:26 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFE70BFC; Mon, 7 Nov 2022 01:33:23 -0800 (PST) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 21A6566028AE; Mon, 7 Nov 2022 09:33:22 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1667813602; bh=6NwMJFI6osQ8vcsqL/iCBpLI1i5GePEmjL73qupB9I4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=HXRv3f5XGuH1GVY0cARvvgJCSoGi/8hGpFISdrPmO44dMt0bkJBFoZjzK/GPWpIru VWKZXZ+fK8EO+SfWCzLc7QcIyTOXmfFe73je1VWBKbV1N5tyCjKxiPxrWq6lORMQwW NFLEYJ53bUoTibgzB8FnBeA58Lj/x5oCc9DRNwTA6X4IGAyBDXzZMjMFacrm9YebqC kNleduv97xJ9yCB+rsZFE3qlc0V7liaS1HS+0tbAXnLLGLvriU8GqPz8hHP5SvRGv7 pZWi1EXif9t/7ZqsMbgMJp7gjWfedUIyIM7TkSeQc2QlYoGL2sTlqKURWHaAnIykbv 3GvRpVU6ohGVQ== Message-ID: <6e697379-4100-9aca-e536-8e7ef300ed1e@collabora.com> Date: Mon, 7 Nov 2022 10:33:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH v2 4/6] pinctrl: mediatek: fix the pinconf register offset of some pins Content-Language: en-US To: Frank Wunderlich , linux-mediatek@lists.infradead.org Cc: devicetree@vger.kernel.org, Sam Shih , Linus Walleij , Sean Wang , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org References: <20221106080114.7426-1-linux@fw-web.de> <20221106080114.7426-5-linux@fw-web.de> From: AngeloGioacchino Del Regno In-Reply-To: <20221106080114.7426-5-linux@fw-web.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 06/11/22 09:01, Frank Wunderlich ha scritto: > From: Sam Shih > > Correct the bias-pull-up, bias-pull-down and bias-disable register > offset of mt7986 pin-42 to pin-49, in the original driver, the > relative offset value was erroneously decremented by 1. > > Fixes: 360de6728064 ("pinctrl: mediatek: add support for MT7986 SoC") > Signed-off-by: Sam Shih > Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno