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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Nícolas F. R. A. Prado" <nfraprado@collabora.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	"Daniel Lezcano" <daniel.lezcano@linaro.org>,
	"Zhang Rui" <rui.zhang@intel.com>,
	"Lukasz Luba" <lukasz.luba@arm.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"Alexandre Mergnat" <amergnat@baylibre.com>,
	"Balsam CHIHI" <bchihi@baylibre.com>
Cc: kernel@collabora.com, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	"Hsin-Te Yuan" <yuanhsinte@chromium.org>,
	"Chen-Yu Tsai" <wenst@chromium.org>,
	"Bernhard Rosenkränzer" <bero@baylibre.com>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH 2/5] thermal/drivers/mediatek/lvts: Disable Stage 3 thermal threshold
Date: Tue, 26 Nov 2024 10:43:49 +0100	[thread overview]
Message-ID: <6eece7bb-acb8-4b0d-9d45-86e8dff44ed3@collabora.com> (raw)
In-Reply-To: <20241125-mt8192-lvts-filtered-suspend-fix-v1-2-42e3c0528c6c@collabora.com>

Il 25/11/24 22:20, Nícolas F. R. A. Prado ha scritto:
> The Stage 3 thermal threshold is currently configured during
> the controller initialization to 105 Celsius. From the kernel
> perspective, this configuration is harmful because:
> * The stage 3 interrupt that gets triggered when the threshold is
>    crossed is not handled in any way by the IRQ handler, it just gets
>    cleared. Besides, the temperature used for stage 3 comes from the
>    sensors, and the critical thermal trip points described in the
>    Devicetree will already cause a shutdown when crossed (at a lower
>    temperature, of 100 Celsius, for all SoCs currently using this
>    driver).
> * The only effect of crossing the stage 3 threshold that has been
>    observed is that it causes the machine to no longer be able to enter
>    suspend. Even if that was a result of a momentary glitch in the
>    temperature reading of a sensor (as has been observed on the
>    MT8192-based Chromebooks).
> 
> For those reasons, disable the Stage 3 thermal threshold configuration.
> 
> Cc: stable@vger.kernel.org
> Reported-by: Hsin-Te Yuan <yuanhsinte@chromium.org>
> Closes: https://lore.kernel.org/all/20241108-lvts-v1-1-eee339c6ca20@chromium.org/
> Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver")
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>



  reply	other threads:[~2024-11-26  9:43 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-25 21:20 [PATCH 0/5] thermal/drivers/mediatek/lvts: Fixes for suspend and IRQ storm, and cleanups Nícolas F. R. A. Prado
2024-11-25 21:20 ` [PATCH 1/5] thermal/drivers/mediatek/lvts: Disable monitor mode during suspend Nícolas F. R. A. Prado
2024-11-26  8:00   ` Hsin-Te Yuan
2024-11-26 13:37     ` Nícolas F. R. A. Prado
2024-11-27  7:27       ` Hsin-Te Yuan
2024-11-26  9:43   ` AngeloGioacchino Del Regno
2024-11-26 13:19     ` Nícolas F. R. A. Prado
2024-11-26 14:38       ` AngeloGioacchino Del Regno
2024-11-25 21:20 ` [PATCH 2/5] thermal/drivers/mediatek/lvts: Disable Stage 3 thermal threshold Nícolas F. R. A. Prado
2024-11-26  9:43   ` AngeloGioacchino Del Regno [this message]
2024-11-25 21:20 ` [PATCH 3/5] thermal/drivers/mediatek/lvts: Disable low offset IRQ for minimum threshold Nícolas F. R. A. Prado
2024-11-26  9:43   ` AngeloGioacchino Del Regno
2024-11-25 21:20 ` [PATCH 4/5] thermal/drivers/mediatek/lvts: Start sensor interrupts disabled Nícolas F. R. A. Prado
2024-11-26  9:43   ` AngeloGioacchino Del Regno
2024-11-25 21:20 ` [PATCH 5/5] thermal/drivers/mediatek/lvts: Only update IRQ enable for valid sensors Nícolas F. R. A. Prado
2024-11-26  9:43   ` AngeloGioacchino Del Regno

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