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From: Florian Eckert <fe@dev.tdt.de>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Johan Hovold" <johan+linaro@kernel.org>,
	"Sajid Dalvi" <sdalvi@google.com>,
	"Ajay Agarwal" <ajayagarwal@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, Eckert.Florian@googlemail.com,
	ms@dev.tdt.de
Subject: Re: [PATCH v5 0/7] PCI: intel-gw: Fixes to make the driver working again
Date: Wed, 6 May 2026 08:45:26 +0200 (CEST)	[thread overview]
Message-ID: <6f483189ec993e3e5f89bccec11cc02a@dev.tdt.de> (raw)
In-Reply-To: <20260417-pcie-intel-gw-v5-0-0a2b933fe04f@dev.tdt.de>

Just a friendly reminder. I hope I’ve incorporated all your comments.
If there’s anything else you’d like me to do, please let me know.

On 2026-04-17 10:35, Florian Eckert wrote:
> This series fixes and improve the 'intel-gw' driver to work again with
> the current dwc pcie framework. The following changes are:
> 
> * Move interrupt 'enable' to its own function to improve readability,
>   and add additional register writes just as the Maxlinear kernel does 
> in
>   their SDK.
> * Enable clock for the PHY before PHY init call.
> * Add missing 'start_link' callback. That was added to the PCIe dwc
>   framework.
> * Move ATU base address assignment to the probe function and also add 
> the
>   the possibility to read it from the devicetree by dwc core.
> * Update devicetree documentation for intel-gw-pcie.yaml
> * Remove unused preprocessor define.
> * Mark driver as orphaned as the maitainer's email no longer works
> 
> Signed-off-by: Florian Eckert <fe@dev.tdt.de>
> ---
> Changes in v5:
> - Also add the DTS 'minItems' option for 'reg-names'.
> - Add missing quotation marks to the DTS example change to make the DTS
>   bot hopefully happy.
> - Link to v4:
> https://lore.kernel.org/r/20260415-pcie-intel-gw-v4-0-ad45d2418c8e@dev.tdt.de
> 
> Changes in v4:
> - Add 'atu' to the end of the resource definition to ensure backwords
>   compatibility.
> - Updated the commit description to explain why the MaxLinear SDK is 
> used
>   as a reference.
> - Remove 'Rahul Tanwar <rtanwar@maxlinear.com>' out of the loop, as the 
> email
>   address is no longer valid and is being rejected.
> - Link to v3:
> https://lore.kernel.org/r/20260401-pcie-intel-gw-v3-0-63b008c5b7b2@dev.tdt.de
> 
> Changes in v3:
> - Update commit messages.
> - Correct the sample code for dt bindings by adding the missing 
> quotation
>   marks. Add 'minItems: 3' to avoid ABI issues.
> - Move driver atu base assignment to probe function and keep backward
>   compatibility.
> - Link to v2:
> https://lore.kernel.org/r/20260330-pcie-intel-gw-v2-0-8bd07367a298@dev.tdt.de
> 
> Changes in v2:
> - Added additional information to the commit descriptions
> - Add additional patch to mark driver as orphaned as the maintainer's
>   email no longer works.
> - Fix wrong error path for enable clock before phy init.
> - Add new patch to update the devicetree documentation for the 'atu'
>   resource
> - Add additional recipients responsible for documenting the dervicetree
>   bindings.
> - Link to v1:
> https://lore.kernel.org/r/20260317-pcie-intel-gw-v1-0-7fe13726ad4f@dev.tdt.de
> 
> ---
> Florian Eckert (7):
>       MAINTAINERS: Remove bouncing intel-gw maintainer
>       PCI: intel-gw: Remove unused define
>       PCI: intel-gw: Move interrupt enable to own function
>       PCI: intel-gw: Enable clock before phy init
>       PCI: intel-gw: Add start_link callback function
>       PCI: intel-gw: Move driver atu base assignment to probe function
>       dt-bindings: PCI: intel,lgm-pcie: Add atu resource
> 
>  .../devicetree/bindings/pci/intel-gw-pcie.yaml     |  9 ++-
>  MAINTAINERS                                        |  3 +-
>  drivers/pci/controller/dwc/pcie-intel-gw.c         | 73 
> +++++++++++++++-------
>  3 files changed, 58 insertions(+), 27 deletions(-)
> ---
> base-commit: 028ef9c96e96197026887c0f092424679298aae8
> change-id: 20260317-pcie-intel-gw-50902113f9e1
> 
> Best regards,

      parent reply	other threads:[~2026-05-06  7:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-17  8:35 [PATCH v5 0/7] PCI: intel-gw: Fixes to make the driver working again Florian Eckert
2026-04-17  8:35 ` [PATCH v5 1/7] MAINTAINERS: Remove bouncing intel-gw maintainer Florian Eckert
2026-04-17  8:35 ` [PATCH v5 2/7] PCI: intel-gw: Remove unused define Florian Eckert
2026-04-17  8:35 ` [PATCH v5 3/7] PCI: intel-gw: Move interrupt enable to own function Florian Eckert
2026-04-17  8:35 ` [PATCH v5 4/7] PCI: intel-gw: Enable clock before phy init Florian Eckert
2026-04-17  8:35 ` [PATCH v5 5/7] PCI: intel-gw: Add start_link callback function Florian Eckert
2026-04-17  8:35 ` [PATCH v5 6/7] PCI: intel-gw: Move driver atu base assignment to probe function Florian Eckert
2026-04-17  8:35 ` [PATCH v5 7/7] dt-bindings: PCI: intel,lgm-pcie: Add atu resource Florian Eckert
2026-04-21 19:04   ` Rob Herring (Arm)
2026-05-06  6:45 ` Florian Eckert [this message]

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