From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Frank Wunderlich <linux@fw-web.de>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: "Frank Wunderlich" <frank-w@public-files.de>,
"Nícolas F. R. A. Prado" <nfraprado@collabora.com>,
"Mason Chang" <mason-cw.chang@mediatek.com>,
"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
"Balsam CHIHI" <bchihi@baylibre.com>,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v1 4/5] thermal/drivers/mediatek/lvts_thermal: Add SoC based golden Temp
Date: Mon, 27 Oct 2025 11:45:34 +0100 [thread overview]
Message-ID: <6f71b834-2b4d-48a8-be6f-1efdf0e78812@collabora.com> (raw)
In-Reply-To: <20251026122143.71100-5-linux@fw-web.de>
Il 26/10/25 13:21, Frank Wunderlich ha scritto:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> Add SoC based golden temp for invalid efuse data.
>
> This is a preliminary patch for mt7987 support where goldentemp is
> slightly higher than other SOCs.
>
I've found this "hack" required for all of the preproduction SoCs, as those are
usually unfused and/or missing at least some calibration parameters.
Are you using an early/preproduction/whatever SoC, or are you testing on a retail
board?
Regards,
Angelo
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> drivers/thermal/mediatek/lvts_thermal.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
> index 9413b30f7b69..544941e8219a 100644
> --- a/drivers/thermal/mediatek/lvts_thermal.c
> +++ b/drivers/thermal/mediatek/lvts_thermal.c
> @@ -134,6 +134,7 @@ struct lvts_data {
> int num_init_cmd;
> int temp_factor;
> int temp_offset;
> + int golden_temp;
> int gt_calib_bit_offset;
> unsigned int def_calibration;
> bool irq_enable;
> @@ -811,8 +812,10 @@ static int lvts_golden_temp_init(struct device *dev, u8 *calib,
> gt = (((u32 *)calib)[0] >> lvts_data->gt_calib_bit_offset) & 0xff;
>
> /* A zero value for gt means that device has invalid efuse data */
> - if (gt && gt < LVTS_GOLDEN_TEMP_MAX)
> + if (gt && gt <= LVTS_GOLDEN_TEMP_MAX)
> golden_temp = gt;
> + else
> + golden_temp = lvts_data->golden_temp;
>
> golden_temp_offset = golden_temp * 500 + lvts_data->temp_offset;
>
> @@ -1786,6 +1789,7 @@ static const struct lvts_data mt7988_lvts_ap_data = {
> .num_init_cmd = ARRAY_SIZE(mt7988_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT7988,
> .temp_offset = LVTS_COEFF_B_MT7988,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .irq_enable = true, //SDK false
> };
> @@ -1799,6 +1803,7 @@ static const struct lvts_data mt8186_lvts_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT7988,
> .temp_offset = LVTS_COEFF_B_MT7988,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .def_calibration = 19000,
> .irq_enable = true,
> @@ -1813,6 +1818,7 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 20,
> .def_calibration = 35000,
> .irq_enable = true,
> @@ -1827,6 +1833,7 @@ static const struct lvts_data mt8188_lvts_ap_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 20,
> .def_calibration = 35000,
> .irq_enable = true,
> @@ -1841,6 +1848,7 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .def_calibration = 35000,
> .irq_enable = true,
> @@ -1855,6 +1863,7 @@ static const struct lvts_data mt8192_lvts_ap_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .def_calibration = 35000,
> .irq_enable = true,
> @@ -1869,6 +1878,7 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .def_calibration = 35000,
> .irq_enable = true,
> @@ -1883,6 +1893,7 @@ static const struct lvts_data mt8195_lvts_ap_data = {
> .num_init_cmd = ARRAY_SIZE(default_init_cmds),
> .temp_factor = LVTS_COEFF_A_MT8195,
> .temp_offset = LVTS_COEFF_B_MT8195,
> + .golden_temp = LVTS_GOLDEN_TEMP_DEFAULT,
> .gt_calib_bit_offset = 24,
> .def_calibration = 35000,
> };
next prev parent reply other threads:[~2025-10-27 10:45 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-26 12:21 [PATCH v1 0/5] Add MT7987 Thermal support Frank Wunderlich
2025-10-26 12:21 ` [PATCH v1 1/5] dt-bindings: thermal: mediatek: make interrupt only required for current SoCs Frank Wunderlich
2025-10-27 10:43 ` AngeloGioacchino Del Regno
2025-11-14 17:12 ` Frank Wunderlich (linux)
2025-10-26 12:21 ` [PATCH v1 2/5] dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for MT7987 Frank Wunderlich
2025-10-27 19:25 ` Rob Herring (Arm)
2025-10-26 12:21 ` [PATCH v1 3/5] thermal/drivers/mediatek/lvts_thermal: Add no-irq-mode for mt7987 Frank Wunderlich
2025-10-26 12:21 ` [PATCH v1 4/5] thermal/drivers/mediatek/lvts_thermal: Add SoC based golden Temp Frank Wunderlich
2025-10-27 10:45 ` AngeloGioacchino Del Regno [this message]
2025-10-27 11:56 ` Aw: " Frank Wunderlich
2025-10-26 12:21 ` [PATCH v1 5/5] thermal/drivers/mediatek/lvts_thermal: Add mt7987 support Frank Wunderlich
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