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Wed, 2 Apr 2025 17:19:19 +0530 (IST) Received: from zimbra.couthit.local (zimbra.couthit.local [10.10.10.103]) by zimbra.couthit.local (Postfix) with ESMTP id A534E17821E7; Wed, 2 Apr 2025 17:19:19 +0530 (IST) Date: Wed, 2 Apr 2025 17:19:19 +0530 (IST) From: Parvathi Pudi To: nm , Kevin Hilman Cc: basharath , ssantosh , linux-kernel , linux-arm-kernel , pratheesh , Prajith Jayarajan , Vignesh Raghavendra , danishanwar , praneeth , srk , rogerq , afd , krishna , pmohan , mohan , parvathi Message-ID: <706306271.973226.1743594559548.JavaMail.zimbra@couthit.local> In-Reply-To: <1365068627.843903.1742210370862.JavaMail.zimbra@couthit.local> References: <20250108125937.10604-1-basharath@couthit.com> <20250108125937.10604-2-basharath@couthit.com> <20250307210517.5xjfc6wntcbj3s4k@precision> <1365068627.843903.1742210370862.JavaMail.zimbra@couthit.local> Subject: Re: [PATCH v2 1/1] soc: ti: PRUSS OCP configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Mailer: Zimbra 8.8.15_GA_3968 (ZimbraWebClient - FF113 (Linux)/8.8.15_GA_3968) Thread-Topic: PRUSS OCP configuration Thread-Index: DvRQZaXzAimB/uZVNUsWawvfCP38JsM+ekCT X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.wki.vra.mybluehostin.me X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - couthit.com X-Get-Message-Sender-Via: server.wki.vra.mybluehostin.me: authenticated_id: smtp@couthit.com X-Authenticated-Sender: server.wki.vra.mybluehostin.me: smtp@couthit.com X-Source: X-Source-Args: X-Source-Dir: Hi Nishanth, >> On 18:29-20250108, Basharath Hussain Khaja wrote: >>> From: Roger Quadros >>> >>> Updates OCP master port configuration to enable memory access outside >>> of the PRU-ICSS subsystem. >>> >>> This set of changes configures PRUSS_SYSCFG.STANDBY_INIT bit either >>> to enable or disable the OCP master ports (applicable only on SoCs >>> using OCP interconnect like the OMAP family). >>> >>> Signed-off-by: Roger Quadros >>> Signed-off-by: Andrew F. Davis >>> Signed-off-by: Parvathi Pudi >>> Signed-off-by: Basharath Hussain Khaja >> >> On the verge of applying this patch, looking deeper, I noticed >> drivers/bus/ti-sysc.c managing the sysc controls. infact, I wonder if >> b2745d92bb015cc4454d4195c4ce6e2852db397e ("bus: ti-sysc: Add support >> for PRUSS SYSC type") could be merged with this? >> >> >> Could you say why drivers/bus/ti-sysc.c would'nt be the right solution? >> >> Ccying Kevin if he has any ideas about this. >> > > Thank you for the feedback. > > We will analyze ti-sysc and revert back with an update shortly. > We've reviewed the code and decided to bypass the SOC patch posted here. Instead, we have implemented the required changes in the "drivers/bus/ti-sysc.c" file to enable OCMC access to the PRU-ICSS and verified the Ethernet functionality over PRUETH on AM335x, AM437x and AM57x platforms. This patch will be abandoned and a new patch will be posted with "drivers/bus/ti-sysc.c" changes shortly. Thanks and Regards, Parvathi.