From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4F4DF21C178; Tue, 22 Jul 2025 08:49:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753174174; cv=none; b=CluQRDaGxAOOg+Wbb9oU1NvgtChY69MCnHltfh2Fj2m8fC7MqDFA8mjDLjNcjvuVKsFU2F3JngM6rmDsC0y7+Uwg5kDtVN0Z+N0ycA26AUnO6DBkWJL4bkRfSG3b4H+Imn2gPxzdaIKf/uE+vsM0pBA4Kw7Phykv0lgvKYA4Xw4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753174174; c=relaxed/simple; bh=VnCmq82uXeT9fbTPAPxiNjJsKPCdRg/XONRuwA8LE3I=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=VmU2r32NuRe7ARod4n3M4myR3gz7H+MDJIE8YiV2UmtV/vocLfBPIWuOy1yyLkmwb6GQGkEsvjAvigah7TRxDdhKDBdUs1/+InRmOCA3dQHWFCnHIWxbH5+oXmegqxvOv59UK/QR+o6iIwhTFs53H/j85lwKYhvJmLerSjaDKDM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1CC97152B; Tue, 22 Jul 2025 01:49:26 -0700 (PDT) Received: from [10.1.36.73] (Suzukis-MBP.cambridge.arm.com [10.1.36.73]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 22D583F59E; Tue, 22 Jul 2025 01:49:29 -0700 (PDT) Message-ID: <727fa9f4-fe25-495e-9d8d-48e504fbe6b0@arm.com> Date: Tue, 22 Jul 2025 09:49:28 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] dt-bindings: arm: Add Qualcomm extended CTI Content-Language: en-GB To: Mao Jinlong , Mike Leach , James Clark , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shishkin Cc: Yingchao Deng , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20250722081405.2947294-1-quic_jinlmao@quicinc.com> <20250722081405.2947294-2-quic_jinlmao@quicinc.com> From: Suzuki K Poulose In-Reply-To: <20250722081405.2947294-2-quic_jinlmao@quicinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 22/07/2025 09:14, Mao Jinlong wrote: > From: Yingchao Deng > > Add Qualcomm extended CTI support in CTI binding file. Qualcomm > extended CTI supports up to 128 triggers. > > Signed-off-by: Yingchao Deng > Signed-off-by: Mao Jinlong > --- > Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > index 2d5545a2b49c..1aa27461f5bc 100644 > --- a/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml > @@ -84,7 +84,9 @@ properties: > - const: arm,coresight-cti > - const: arm,primecell > - items: > - - const: arm,coresight-cti-v8-arch > + - enum: > + - arm,coresight-cti-v8-arch > + - qcom,coresight-cti-extended Why not call it qcom,coresight-cti ? There are no other "qcom,coresight-cti", so "extended" is not required. Is this specific to CPU (i.e., CPU bound) ? Suzuki > - const: arm,coresight-cti > - const: arm,primecell >