From: Krzysztof Kozlowski <krzk@kernel.org>
To: Devang Tailor <dev.tailor@samsung.com>,
alim.akhtar@samsung.com, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: add cpu cache information to ExynosAuto-v920
Date: Tue, 31 Dec 2024 08:43:11 +0100 [thread overview]
Message-ID: <743d9eb4-a7ee-4ce7-91a8-52ddcd353bb2@kernel.org> (raw)
In-Reply-To: <20241231064350.523713-1-dev.tailor@samsung.com>
On 31/12/2024 07:43, Devang Tailor wrote:
>
> cpu9: cpu@20100 {
> @@ -152,6 +215,22 @@ cpu9: cpu@20100 {
> compatible = "arm,cortex-a78ae";
> reg = <0x0 0x20100>;
> enable-method = "psci";
> + i-cache-size = <0x10000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <256>;
> + d-cache-size = <0x10000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <256>;
> + next-level-cache = <&cpu_l2>;
> + };
> +
> + cpu_l2: l2-cache0 {
Are there more l2-caches? '0' suggests that, so please add nodes for all
of them.
Best regards,
Krzysztof
next prev parent reply other threads:[~2024-12-31 7:43 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20241231063730epcas5p4137cc2e3d805cb08e1675b056ef186dc@epcas5p4.samsung.com>
2024-12-31 6:43 ` [PATCH] arm64: dts: add cpu cache information to ExynosAuto-v920 Devang Tailor
2024-12-31 7:43 ` Krzysztof Kozlowski [this message]
2025-01-06 8:39 ` Devang Tailor
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