Re: [PATCH v2 03/24] MIPS: PCI: Use pci_enable_resources()

Maciej W. Rozycki
2025-10-18T21:32:56Z

On Tue, 14 Oct 2025, Maciej W. Rozycki wrote:

> > > As you can see there are holes in the map below 0x100, so e.g. if the bus
> > > master IDE I/O space registers (claimed last in the list by `ata_piix')
> > > were assigned to 00000030-0000003f, then all hell would break loose. It
> > > is exactly the mapping that happened in the absence of the code piece in
> > > question IIRC.
> >
> > Are you sure pci-malta.c has to do anything like this as
> > pcibios_align_resource() does lower bound IO resource start addresses if
> > PCIBIOS_MIN_IO is set?
>
> Well, PCIBIOS_MIN_IO is never set for Malta and therefore stays at 0. I
> could boot 2.6.11 with the hunk reverted and see what happens, not a big
> deal (I should have old GCC somewhere as a kernel such old would surely be
> a pain to build with modern GCC). This stuff was badly broken before
> commit ae81aad5c2e1 (and there was support there too for the Atlas board,
> a weird one with a Philips SAA9730 southbridge and supporting a subset of
> the same CPU core cards as the Malta board does).

Well, it is a big deal after all, since I've lost my old CoreLV CPU card
and the replacement Core74K one is too new for 2.6.x both in terms of the
CPU and the system controller. No doubt with some patching it should be
able to get it booted, but it's not worth the effort.

So instead I've just removed the hunk with my most recent compilation and
what I've got is:

ata1: PATA max UDMA/33 cmd 0x1f0 ctl 0x3f6 bmdma 0x30 irq 14 lpm-pol 0
ata2: PATA max UDMA/33 cmd 0x170 ctl 0x376 bmdma 0x38 irq 15 lpm-pol 0

(notice the 0x30/0x38 bmdma allocations, which just confirms my memory)
and then a temporary hang, a couple of more lines printed and the system
silently rebooted back into YAMON.

Having configured with ATA and PCNET32 disabled I get this:

00000000-00ffffff : MSC PCI I/O
00000000-0000001f : 0000:00:0a.2
00000020-00000021 : pic1
00000030-0000003f : 0000:00:0a.1
00000040-0000005f : 0000:00:0b.0
00000060-0000006f : i8042
00000070-00000077 : rtc0
000000a0-000000a1 : pic2
00000170-00000177 : 0000:00:0a.1
000001f0-000001f7 : 0000:00:0a.1
000002f8-000002ff : serial
00000376-00000376 : 0000:00:0a.1
00000378-0000037a : parport0
0000037b-0000037f : parport0
000003f6-000003f6 : 0000:00:0a.1
000003f8-000003ff : serial
00000400-000004ff : 0000:00:13.0
00000800-0000087f : 0000:00:12.0
00000800-0000087f : defxx
00001000-0000103f : 0000:00:0a.3
00001100-0000110f : 0000:00:0a.3

which does look nasty (although technically correctly shows southbridge
resources within the system controller's PCI I/O window). At least the
defxx driver still works with the FDDI network interface at its port I/O
assignment so the system boots multiuser NFS-rooted.

Maciej