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From: Macpaul Lin <macpaul.lin@mediatek.com>
To: "Chen-Yu Tsai" <wenst@chromium.org>,
	"Nícolas F. R. A. Prado" <nfraprado@collabora.com>,
	"Chunfeng Yun" <chunfeng.yun@mediatek.com>,
	"Bear Wang" <bear.wang@mediatek.com>,
	"Pablo Sun" <pablo.sun@mediatek.com>,
	chris-qj.chen@mediatek.com
Cc: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, <kernel@collabora.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH] arm64: dts: mediatek: mt8195: Add missing clock for xhci1 controller
Date: Thu, 25 Jul 2024 20:59:54 +0800	[thread overview]
Message-ID: <7603f704-caf2-a5b9-e84e-bfec210273b8@mediatek.com> (raw)
In-Reply-To: <CAGXv+5H_pxR18sHeqdWPy9_FARrnLwyyOHV4VXCn9p5OExseiQ@mail.gmail.com>



On 7/25/24 18:34, Chen-Yu Tsai wrote:
> 	
> 
> External email : Please do not click links or open attachments until you 
> have verified the sender or the content.
> 
> Hi,
> 
> On Mon, Jul 22, 2024 at 11:27 PM Nícolas F. R. A. Prado
> <nfraprado@collabora.com> wrote:
>>
>> Currently if the xhci1 controller happens to probe before the pcie1
>> controller then it fails with the following errors:
>>
>> xhci-mtk 11290000.usb: clocks are not stable (0x1003d0f)
>> xhci-mtk 11290000.usb: can't setup: -110
>> xhci-mtk: probe of 11290000.usb failed with error -110
>>
>> The issue has been tracked down to the CLK_INFRA_AO_PCIE_P1_TL_96M
>> clock, although exactly why this pcie clock is needed for the usb
>> controller is still unknown. Add the clock to the xhci1 controller so it
>> always probes successfully and use a placeholder clock name for it.
>>
>> Reported-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> #KernelCI
>> Closes: https://lore.kernel.org/all/9fce9838-ef87-4d1b-b3df-63e1ddb0ec51@notapiano/
>> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
> 
> So I asked MediaTek about this, and it seems the correct thing to do is
> disable USB 3 on this host controller using the following snippet. The
> snippet is copy-pasted from our issue tracker and won't apply directly.
> 
> This is also seen in mt8395-kontron-3-5-sbc-i1200.dts, on which xhci1
> is used only for USB 2.0 on an M.2 slot.
> 
> 
> ChenYu
> 
> index 8b7307cdefc6..2dac9f706a58
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1447,6 +1447,7 @@
>                                        "xhci_ck";
>                          mediatek,syscon-wakeup = <&pericfg 0x400 104>;
>                          wakeup-source;
> +                       mediatek,u3p-dis-msk = <0x1>;
>                          status = "disabled";
>                  };

If this is the other final solution, please help to add it per-board 
basis dts.
mt8395-genio-1200-evk indeed uses USB3 XHCI function for this port.
https://mediatek.gitlab.io/atio/doc/aiot-dev-guide/master_images/hw_evk_g1200-evk_ports.png.
You can see a USB3 port at the left bottom in this picture.
Otherwise, we need to check if it is possible to override
mediatek,u3p-dis-msk = <0x1> with <0x0>;


>> ---
>>  arch/arm64/boot/dts/mediatek/mt8195.dtsi | 10 ++++++++--
>>  1 file changed, 8 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>> index 2ee45752583c..cc5169871f1c 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
>> @@ -1453,9 +1453,15 @@ xhci1: usb@11290000 {
>>                                  <&topckgen CLK_TOP_SSUSB_P1_REF>,
>>                                  <&apmixedsys CLK_APMIXED_USB1PLL>,
>>                                  <&clk26m>,
>> -                                <&pericfg_ao CLK_PERI_AO_SSUSB_1P_XHCI>;
>> +                                <&pericfg_ao CLK_PERI_AO_SSUSB_1P_XHCI>,
>> +                                /*
>> +                                 * This clock is required due to a hardware
>> +                                 * bug. The 'frmcnt_ck' clock name is used as a
>> +                                 * placeholder.
>> +                                 */
>> +                                <&infracfg_ao CLK_INFRA_AO_PCIE_P1_TL_96M>;
>>                         clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
>> -                                     "xhci_ck";
>> +                                     "xhci_ck", "frmcnt_ck";
>>                         mediatek,syscon-wakeup = <&pericfg 0x400 104>;
>>                         wakeup-source;
>>                         status = "disabled";
>>
>> ---
>> base-commit: dee7f101b64219f512bb2f842227bd04c14efe30
>> change-id: 20240722-usb-1129-probe-pci-clk-fix-ef8646f46aac
>>
>> Best regards,
>> --
>> Nícolas F. R. A. Prado <nfraprado@collabora.com>
>>
>>
> 

Thanks
Macpaul Lin

  reply	other threads:[~2024-07-25 13:00 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-22 15:26 [PATCH] arm64: dts: mediatek: mt8195: Add missing clock for xhci1 controller Nícolas F. R. A. Prado
2024-07-23  6:18 ` AngeloGioacchino Del Regno
2024-07-25 10:34 ` Chen-Yu Tsai
2024-07-25 12:59   ` Macpaul Lin [this message]
2024-07-26 12:11   ` AngeloGioacchino Del Regno
2024-07-26 15:11     ` Chen-Yu Tsai
2024-07-29  7:59       ` AngeloGioacchino Del Regno
2024-07-29  8:07         ` Chen-Yu Tsai
2024-07-29  8:54           ` AngeloGioacchino Del Regno
2024-07-29 10:48             ` Chen-Yu Tsai
2024-07-29 12:34               ` AngeloGioacchino Del Regno
2024-07-29 18:14                 ` Nícolas F. R. A. Prado
2024-07-30  4:17                   ` Chen-Yu Tsai
2024-07-30  9:09                     ` AngeloGioacchino Del Regno

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