From: Gatien CHEVALLIER <gatien.chevallier@foss.st.com>
To: "Rob Herring" <robh@kernel.org>,
"Clément Le Goffic" <clement.legoffic@foss.st.com>
Cc: Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Jonathan Corbet <corbet@lwn.net>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Gabriel Fernandez <gabriel.fernandez@foss.st.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Le Goffic <legoffic.clement@gmail.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-perf-users@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-clk@vger.kernel.org>
Subject: Re: [PATCH v2 02/16] dt-bindings: stm32: stm32mp25: add `access-controller-cell` property
Date: Tue, 15 Jul 2025 09:37:00 +0200 [thread overview]
Message-ID: <765eccdc-7d51-42c6-bcba-07813077fc1d@foss.st.com> (raw)
In-Reply-To: <20250715031717.GA4144523-robh@kernel.org>
Hello Rob,
On 7/15/25 05:17, Rob Herring wrote:
> On Fri, Jul 11, 2025 at 04:48:54PM +0200, Clément Le Goffic wrote:
>> RCC is able to check the availability of a clock.
>> Allow to query the RCC with a firewall ID.
>
> If it is tied to a clock, do we need another provider? We have the
> "protected clocks" thing, but that might be a bit different.
>
I couldn't find any reference to "protected-clocks" outside of qcom
related code, is there a documentation? (Couldn't find it in
clocks.yaml).
The RCC is firewall-aware and has it's own firewall configuration at
RCC level for some system resources. When checking access to a clock,
or a reset, we're reading RCC registers, hence declaring it as an
access-controller.
A RCC resource's firewall configuration usually covers more than a
clock.
>>
>> Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
>> ---
>> Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> index 88e52f10d1ec..4d471e3d89bc 100644
>> --- a/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml
>> @@ -31,6 +31,11 @@ properties:
>> '#reset-cells':
>> const: 1
>>
>> + '#access-controller-cells':
>> + const: 1
>> + description:
>> + Contains the firewall ID associated to the peripheral.
>> +
>> clocks:
>> items:
>> - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz)
>> @@ -123,6 +128,7 @@ required:
>> - reg
>> - '#clock-cells'
>> - '#reset-cells'
>> + - '#access-controller-cells'
>> - clocks
>>
>> additionalProperties: false
>> @@ -136,6 +142,7 @@ examples:
>> reg = <0x44200000 0x10000>;
>> #clock-cells = <1>;
>> #reset-cells = <1>;
>> + #access-controller-cells = <1>;
>> clocks = <&scmi_clk CK_SCMI_HSE>,
>> <&scmi_clk CK_SCMI_HSI>,
>> <&scmi_clk CK_SCMI_MSI>,
>>
>> --
>> 2.43.0
>>
Best regards,
Gatien
next prev parent reply other threads:[~2025-07-15 7:40 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-11 14:48 [PATCH v2 00/16] Introduce STM32 DDR PMU for STM32MP platforms Clément Le Goffic
2025-07-11 14:48 ` [PATCH v2 01/16] bus: firewall: move stm32_firewall header file in include folder Clément Le Goffic
2025-07-11 14:48 ` [PATCH v2 02/16] dt-bindings: stm32: stm32mp25: add `access-controller-cell` property Clément Le Goffic
2025-07-15 3:17 ` Rob Herring
2025-07-15 7:37 ` Gatien CHEVALLIER [this message]
2025-07-15 8:19 ` Krzysztof Kozlowski
2025-07-15 8:40 ` Gatien CHEVALLIER
2025-07-15 11:47 ` Clement LE GOFFIC
2025-07-11 14:48 ` [PATCH v2 03/16] clk: stm32mp25: add firewall grant_access ops Clément Le Goffic
2025-07-11 14:48 ` [PATCH v2 04/16] arm64: dts: st: set rcc as an access-controller Clément Le Goffic
2025-07-11 14:48 ` [PATCH v2 05/16] dt-bindings: memory: add jedec,ddr[3-4]-channel binding Clément Le Goffic
2025-07-21 20:09 ` Rob Herring
2025-07-22 7:35 ` Clement LE GOFFIC
2025-07-11 14:48 ` [PATCH v2 06/16] arm64: dts: st: add LPDDR channel to stm32mp257f-dk board Clément Le Goffic
2025-07-15 3:20 ` Rob Herring
2025-07-15 8:32 ` Clement LE GOFFIC
2025-07-15 15:02 ` Rob Herring
2025-07-21 15:44 ` Clement LE GOFFIC
2025-07-11 14:48 ` [PATCH v2 07/16] arm64: dts: st: add DDR channel to stm32mp257f-ev1 board Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 08/16] dt-bindings: perf: stm32: introduce DDRPERFM dt-bindings Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 09/16] perf: stm32: introduce DDRPERFM driver Clément Le Goffic
2025-07-11 16:04 ` Jonathan Cameron
2025-07-15 9:49 ` Clement LE GOFFIC
2025-07-14 19:39 ` Dan Carpenter
2025-07-11 14:49 ` [PATCH v2 10/16] Documentation: perf: stm32: add ddrperfm support Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 11/16] MAINTAINERS: add myself as STM32 DDR PMU maintainer Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 12/16] ARM: dts: stm32: add ddrperfm on stm32mp131 Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 13/16] ARM: dts: stm32: add ddrperfm on stm32mp151 Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 14/16] arm64: dts: st: add ddrperfm on stm32mp251 Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 15/16] arm64: dts: st: support ddrperfm on stm32mp257f-dk Clément Le Goffic
2025-07-11 14:49 ` [PATCH v2 16/16] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Clément Le Goffic
2025-07-14 15:24 ` [PATCH v2 00/16] Introduce STM32 DDR PMU for STM32MP platforms Rob Herring (Arm)
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