From: Richard Weinberger <richard@nod.at>
To: shiva linuxworks <shiva.linuxworks@gmail.com>
Cc: Tudor Ambarus <tudor.ambarus@microchip.com>,
Michael Walle <michael@walle.cc>, Pratyush Yadav <p.yadav@ti.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd <linux-mtd@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Shivamurthy Shastri <sshivamurthy@micron.com>
Subject: Re: [PATCH 0/4] enabling Advanced protection and security features
Date: Wed, 27 Oct 2021 12:54:09 +0200 (CEST) [thread overview]
Message-ID: <771780049.41543.1635332049033.JavaMail.zimbra@nod.at> (raw)
In-Reply-To: <20211027103352.8879-1-sshivamurthy@micron.com>
----- Ursprüngliche Mail -----
> Von: "shiva linuxworks" <shiva.linuxworks@gmail.com>
> An: "Tudor Ambarus" <tudor.ambarus@microchip.com>, "Michael Walle" <michael@walle.cc>, "Pratyush Yadav"
> <p.yadav@ti.com>, "Miquel Raynal" <miquel.raynal@bootlin.com>, "richard" <richard@nod.at>, "Vignesh Raghavendra"
> <vigneshr@ti.com>
> CC: "linux-mtd" <linux-mtd@lists.infradead.org>, "linux-kernel" <linux-kernel@vger.kernel.org>, "Shivamurthy Shastri"
> <sshivamurthy@micron.com>
> Gesendet: Mittwoch, 27. Oktober 2021 12:33:48
> Betreff: [PATCH 0/4] enabling Advanced protection and security features
> From: Shivamurthy Shastri <sshivamurthy@micron.com>
>
> Standard protection features in SPI NOR flashes are legacy and offer a
> simple way to protect the memory array against accidental or unwanted
> modification of its content.
>
> These patches enable the support for advanced sector protection which
> protects memory from accidentally corrupting code and data stored, and
> it also prevents malicious attacks that could intentionally modify the
> code or data stored in the memory.
>
> Micron Flashes offer some of the advanced protection methods using
> volatile lock bits, non-volatile lock bits, global freeze bits, and
> password.
Can you please point us to the technical documentation of these features?
I'm especially interested in the password feature.
Thanks,
//richard
next prev parent reply other threads:[~2021-10-27 10:54 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-27 10:33 [PATCH 0/4] enabling Advanced protection and security features shiva.linuxworks
2021-10-27 10:33 ` [PATCH 1/4] mtd: spi-nor: micron-st: add advanced " shiva.linuxworks
2021-11-08 15:43 ` Michael Walle
2021-12-06 10:49 ` Paul Barker
2021-10-27 10:33 ` [PATCH 2/4] mtd: spi-nor: add advanced protection and security features support shiva.linuxworks
2021-10-27 21:00 ` kernel test robot
2021-10-27 23:01 ` kernel test robot
2021-10-28 4:43 ` kernel test robot
2021-12-06 11:03 ` Paul Barker
2021-10-27 10:33 ` [PATCH 3/4] mtd: add advanced protection and security ioctls shiva.linuxworks
2021-12-06 10:42 ` Paul Barker
2021-12-06 11:13 ` Paul Barker
2021-10-27 10:33 ` [PATCH 4/4] mtd: spi-nor: micron-st: add mt25qu128abb and mt25ql128abb shiva.linuxworks
2021-12-06 11:05 ` Paul Barker
2021-10-27 10:54 ` Richard Weinberger [this message]
2021-11-08 15:06 ` [EXT] Re: [PATCH 0/4] enabling Advanced protection and security features Shivamurthy Shastri (sshivamurthy)
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