From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F44635AC19 for ; Tue, 7 Apr 2026 15:12:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775574776; cv=none; b=mBmOg14STolEAph75oZbg+k0XQV5RlyPeub7+mcMVkLOOOaYxoAiAh8jQsiLtwTUaohRAK80zBc22oGWmmZTV8kv2aZs+2gjg3Ev1YRVvGS2+SE5XyFZkqnR76WReLEZ8b9tG5HAugT47pfB1sKygcXeDd76OcP4j+OxajM5L7g= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775574776; c=relaxed/simple; bh=M5lgZ/rycwHwuDJmxlQA/pldnZYgh5o1O0sdz/ym/FQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=rTEtSQXFZIQx/SR6cpdb+4JqWJTWwmf4vOhNm1nGldL2U/zcWt2ZHTz/dmnKFYBm8lTJo4aS6FH2tLAKEvnxZLHl34gYfTD4sEGxMBFEGN02H2YKgN3lmA+5LlT120Dl/iKDuukdTWZPSclNkJHXv7hLmPoSKO+nP6kBQ53IJh4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=SrhCrVAr; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="SrhCrVAr" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso47805955e9.1 for ; Tue, 07 Apr 2026 08:12:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1775574774; x=1776179574; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=n1hN8mCBwc97NQZYyYnJTNMhtLwGP6OBa0knSNEhsEI=; b=SrhCrVArYbSnUexuuKKihGscalGqPI/QzOjFRrHaHr0HlRct9NO7fK80oF7pRUVnnZ AQyPhQDVlGJs8hhudrGECrHpN0BY/91AKdbFGKvJLHLRhi+52eBwW/kCT6XirIdABe0X tWEtEoYNyZas1wK2Se72Ska3wd27IZZ2Z+a+IRMT3/Ui8pEafrlnzgWd17lOl1+5d/uE BLO3DK2eZr+VR7CxRZg2xwvy4xjhZ18iqjspbZZmSbNsvQo+q/4Gv+LUtvyikfuwboqw aalWUZjk4oo6QTESph58pqtHp/PR2LjDdu4QTd+O3Ccj0aZLnFx8/5kgU7E1uU4RJXaZ Zgig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1775574774; x=1776179574; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=n1hN8mCBwc97NQZYyYnJTNMhtLwGP6OBa0knSNEhsEI=; b=XsDbm/n1nsOXIjoxnakSQ4VYpIbDE51S8rCvIq6+Gu26z6z6hA6MybCkvtX4oa2bl9 Jv8m81h0I0aaa0ohVmImIWVve58+n81rPaXXlWBXrzUcyrkbVCLzS2RMKxbXk4V8vba2 QNOASI7iClMJ6kwjI6VDPvLG5iIAz+ZyH01/o7odfJRBZT3RJUzxhKvdtBqfNKfORjwg tF5M2Al10MSgjBeVYkMuoNS2NqtqBg8apDcOsd60JSI6uG9PAd0ygA1MI6P4i1jk+df0 T6WSWce3mVtt+jGo5lqVc10TJ/jrWILBCdB5S6YWuyCNdGuSfl5ocINI0IhxMg5b+xUA EGNQ== X-Forwarded-Encrypted: i=1; AJvYcCVXr5AsiEuQGZhk4++oLdEzYvNDpHlXD1MUMxfSKTiNXY0+h38FAw7zYaxIBJZrVbIUTAmBasFE3vCsg1A=@vger.kernel.org X-Gm-Message-State: AOJu0YyNA3gRt3uirY1pUNmlPb80j3JX7RYzuyZIQklnmlHkCkEk+wCv DqVibFS7gjnnWcShSa5eeqTKoiQCahxAIudEz+mbud5u0IQALQ5isaMyG8B+q3Pq9JI= X-Gm-Gg: AeBDies5SuqBNt07T0ilFo8H6TrTrqygTtdjA9XLyVtP1l9Lr8B2sYciyw/PkhU+Sni mqRtf9CRhyJYrVENfBfnHfkscVP+yhqZPjbNHysYG4IM7hR7PejwJpxhmzAAfXNilTJ41ePVgxw UUcC81VFjwDO7h9aD2Xa4RTPrNlkgoZOrwIEoPr9l5oAHbFloj5Ftx3W3+QUQOSw9XC3M/XC4HW il/yD95ZcirugV1zRHBX15MNe2x0MVIl8d+W8ICI3rOPeeJ8NI56hzkqe3K6qWcAyxPg9rROchY NsqZKmQIkbpEzl0b9Ls09rv5TGuvzxCDD57zMupRkBoeypj1Go9zuLAYZdv3iObonujYbfmkYlI fgQ8lD92HFESgXxbENRFszejLPB2j2hs+0n/qLnM6A1Q3CAaKyGADol7w2RlMLMhbTLgCBXl6QN PoI0O8SxVjeFSTfsUi7jnHdWqEAVK+cD9PiQukNg+fkg== X-Received: by 2002:a05:600c:3b1b:b0:485:2a4b:7bc3 with SMTP id 5b1f17b1804b1-488996a3560mr236913405e9.4.1775574773822; Tue, 07 Apr 2026 08:12:53 -0700 (PDT) Received: from [192.168.50.4] ([82.78.167.248]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488a8ddfde7sm428997685e9.5.2026.04.07.08.12.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Apr 2026 08:12:53 -0700 (PDT) Message-ID: <77514d1b-e418-47db-9b47-8f7d8a4cedc5@tuxon.dev> Date: Tue, 7 Apr 2026 18:12:51 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 11/15] dmaengine: sh: rz-dmac: Add cyclic DMA support To: Biju Das , "vkoul@kernel.org" , "Frank.Li@kernel.org" , "lgirdwood@gmail.com" , "broonie@kernel.org" , "perex@perex.cz" , "tiwai@suse.com" , Prabhakar Mahadev Lad , "p.zabel@pengutronix.de" , "geert+renesas@glider.be" , Fabrizio Castro Cc: "dmaengine@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-sound@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , Claudiu Beznea References: <20260407133507.887404-1-claudiu.beznea.uj@bp.renesas.com> <20260407133507.887404-12-claudiu.beznea.uj@bp.renesas.com> Content-Language: en-US From: Claudiu Beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi, Biju, On 4/7/26 17:36, Biju Das wrote: > > Hi Claudiu, > > Thanks for the patch. > >> -----Original Message----- >> From: Claudiu >> Sent: 07 April 2026 14:35 >> Subject: [PATCH v3 11/15] dmaengine: sh: rz-dmac: Add cyclic DMA support >> >> From: Claudiu Beznea >> >> Add cyclic DMA support to the RZ DMAC driver. A per-channel status bit is introduced to mark cyclic >> channels and is set during the DMA prepare callback. The IRQ handler checks this status bit and calls >> vchan_cyclic_callback() accordingly. >> >> Signed-off-by: Claudiu Beznea >> --- >> >> Changes in v3: >> - updated rz_dmac_lmdesc_recycle() to restore the lmdesc->nxla >> - in rz_dmac_prepare_descs_for_cyclic() update directly the >> desc->start_lmdesc with the descriptor pointer insted of the >> descriptor address >> - used rz_dmac_lmdesc_addr() to compute the descritor address >> - set channel->status = 0 in rz_dmac_free_chan_resources() >> - in rz_dmac_prep_dma_cyclic() check for invalid periods or buffer len >> and limit the critical area protected by spinlock >> - set channel->status = 0 in rz_dmac_terminate_all() >> - updated rz_dmac_calculate_residue_bytes_in_vd() to use >> rz_dmac_lmdesc_addr() >> - dropped goto in rz_dmac_irq_handler_thread() as it is not needed >> anymore; dropped also the local variable desc >> >> Changes in v2: >> - none >> >> drivers/dma/sh/rz-dmac.c | 144 +++++++++++++++++++++++++++++++++++++-- >> 1 file changed, 138 insertions(+), 6 deletions(-) >> [ ... ] >> @@ -500,6 +562,8 @@ static void rz_dmac_free_chan_resources(struct dma_chan *chan) >> channel->mid_rid = -EINVAL; >> } >> >> + channel->status = 0; >> + >> spin_unlock_irqrestore(&channel->vc.lock, flags); > > Maybe create a patch to convert all the spin_{lock,unlock} with guard() > in this driver. This series already has to many patches and I want to keep only what is necessary for the cyclic support. My plan is to do the guard conversion after cyclic support gets merged. Thank you, Claudiu