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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Wesley Cheng <wesley.cheng@oss.qualcomm.com>,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	konrad.dybcio@oss.qualcomm.com,
	dmitry.baryshkov@oss.qualcomm.com, kishon@kernel.org,
	vkoul@kernel.org, gregkh@linuxfoundation.org, robh@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
	linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 02/10] dt-bindings: phy: qcom,qmp-usb: Add Glymur USB UNI PHY compatible
Date: Sat, 18 Oct 2025 17:39:43 +0200	[thread overview]
Message-ID: <78445973-6a5e-4dd8-a661-4e784af49b4e@kernel.org> (raw)
In-Reply-To: <da34ecf0-c2eb-2afa-bd4d-9dc30fbe5cf5@oss.qualcomm.com>

On 18/10/2025 02:20, Wesley Cheng wrote:
> 
> 
> On 10/16/2025 9:41 PM, Krzysztof Kozlowski wrote:
>> On 17/10/2025 02:15, Wesley Cheng wrote:
>>>>> Technically its all handling the same clock branch (CXO), we have the
>>>>> TCSR clkref register that allows us to gate the CXO to the USB PHY, as
>>>>
>>>>
>>>> Ah, exactly. Then clkref is not a clock. You need rather proper clock
>>>> hierarchy.
>>>>
>>>>> CXO is shared across several HW blocks, so it allows us to properly
>>>>> powerdown the PHY even though other clients are voting for CXO on.  Then
>>>>> we obviously have to remove our vote to the overall CXO, so that it can
>>>>> potentially be shutdown.
>>>>>
>>>>> Maybe we can rename it to "clkref" for the CXO handle and
>>>>> "clkref_switch" for the TCSRCC handle?
>>>>
>>>> Naming is better, but it is still not correct. This is not independent
>>>> clock signal. It is the same clock.
>>>>
>>>
>>> Hmmm... I guess that's why I kept the same clkref tag, to denote that
>>> its the same clock, but one is a switch/gate for it.  Would you happen
>>> to have any suggestions you might have that makes it clearer for
>>> everyone to understand?
>> To me it looks like:
>>
>> |-----|            |-----------|           |------------------|
>> |clock|------------|TCSRCC gate|-----------|clkref to this dev|
>> |-----|            |-----------|           |------------------|
>>
>> So you need proper clock controller for TCSR (TCSR Clock Controller, in
>> short TCSRCC, what a surprise!) which will take input, add gate and
>> produce clock for this device.
>>
>> Nothing non-standard, all Qualcomm SoCs have it, every other platform
>> has it in some way.
>>
> 
> Hi Krzystof,
> 
> Yes, the design is exactly how you outlined it above.  How about clkref 

Hm? There is no connection between the clock and the device. Do you see
any line going there?

> for the clock and tcsrcc_switch for the clkref switch?  That removes any 
> notation that the gate/switch is an actual clock...

You really did not get the point of this entire discussion.


Best regards,
Krzysztof

  reply	other threads:[~2025-10-18 15:39 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-06 22:19 [PATCH v5 00/10] Introduce Glymur USB support Wesley Cheng
2025-10-06 22:19 ` [PATCH v5 01/10] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Glymur compatible Wesley Cheng
2025-10-08  0:42   ` Rob Herring
2025-10-06 22:19 ` [PATCH v5 02/10] dt-bindings: phy: qcom,qmp-usb: Add Glymur USB UNI PHY compatible Wesley Cheng
2025-10-11  0:04   ` Krzysztof Kozlowski
2025-10-13 23:44     ` Wesley Cheng
2025-10-13 23:46       ` Wesley Cheng
2025-10-13 23:50         ` Krzysztof Kozlowski
2025-10-14  1:16           ` Wesley Cheng
2025-10-14  4:36             ` Krzysztof Kozlowski
2025-10-17  0:15               ` Wesley Cheng
2025-10-17  4:41                 ` Krzysztof Kozlowski
2025-10-18  0:20                   ` Wesley Cheng
2025-10-18 15:39                     ` Krzysztof Kozlowski [this message]
2025-10-21 22:51                       ` Wesley Cheng
2025-10-06 22:19 ` [PATCH v5 03/10] dt-bindings: phy: qcom-m31-eusb2: Add Glymur compatible Wesley Cheng
2025-10-11  0:01   ` Krzysztof Kozlowski
2025-10-06 22:19 ` [PATCH v5 04/10] dt-bindings: usb: qcom,snps-dwc3: " Wesley Cheng
2025-10-07  7:47   ` Krzysztof Kozlowski
2025-10-06 22:19 ` [PATCH v5 05/10] dt-bindings: phy: qcom,snps-eusb2-repeater: Add SMB2370 compatible Wesley Cheng
2025-10-07  7:45   ` Krzysztof Kozlowski
2025-10-06 22:19 ` [PATCH v5 06/10] phy: qualcomm: Update the QMP clamp register for V6 Wesley Cheng
2025-10-06 22:19 ` [PATCH v5 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settings Wesley Cheng
2025-10-24 10:04   ` Abel Vesa
2025-10-25  0:02     ` Wesley Cheng
2025-10-25  0:41       ` Wesley Cheng
2025-10-28 21:10         ` Dmitry Baryshkov
2025-10-06 22:20 ` [PATCH v5 08/10] phy: qualcomm: qmp-usb: Add support for Glymur USB UNI PHY Wesley Cheng
2025-10-06 22:20 ` [PATCH v5 09/10] phy: qualcomm: m31-eusb2: Make clkref an optional resource Wesley Cheng
2025-10-06 22:20 ` [PATCH v5 10/10] phy: qualcomm: eusb2-repeater: Add SMB2370 eUSB2 repeater support Wesley Cheng
2025-10-07  1:02 ` [PATCH v5 00/10] Introduce Glymur USB support Krzysztof Kozlowski
2025-10-07  1:05   ` Wesley Cheng
2025-10-07  1:47     ` Krzysztof Kozlowski
2025-10-08  3:31   ` Dmitry Baryshkov

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