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From: <Tudor.Ambarus@microchip.com>
To: <michael@walle.cc>
Cc: <p.yadav@ti.com>, <miquel.raynal@bootlin.com>, <richard@nod.at>,
	<vigneshr@ti.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <Nicolas.Ferre@microchip.com>
Subject: Re: [PATCH v3 1/3] mtd: spi-nor: Parse BFPT to determine the 4-Byte Address Mode methods
Date: Thu, 14 Apr 2022 09:25:39 +0000	[thread overview]
Message-ID: <78aa1754-2f04-9f0b-72ef-f06535a413b0@microchip.com> (raw)
In-Reply-To: <63b485a1e48d3116f8f49cc427049f81@walle.cc>

On 4/14/22 12:03, Michael Walle wrote:

Hi!

> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
>> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
>> index a5211543d30d..2e40eba3744d 100644
>> --- a/drivers/mtd/spi-nor/sfdp.c
>> +++ b/drivers/mtd/spi-nor/sfdp.c
>> @@ -401,6 +401,93 @@ static void
>> spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
>>       }
>>  }
>>
>> +/**
>> + * spansion_set_4byte_addr_mode() - Set 4-byte address mode for
>> Spansion
>> + * flashes.
>> + * @nor:     pointer to 'struct spi_nor'.
>> + * @enable:  true to enter the 4-byte address mode, false to exit the
>> 4-byte
>> + *           address mode.
>> + *
>> + * Return: 0 on success, -errno otherwise.
>> + */
>> +int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
> 
> Mh, so now some callback functions are in the core like the quad enable
> methods and some are in sfdp.c. I think there should be only the parsing
> in sfdp.c and all the callback methods should be in core.c; as they are
> potentially used by the vendor modules.

All set_4byte_addr_mode methods are defined in sfdp.c and declared in sfdp.h.
I kept the methods defined in sfdp.c because SFDP defines their behavior/how
they work. Vendors already have access to all these methods when including
core.h (which includes sfdp.h). No need to move them to core, as they are
SFDP specific.

> 
>> @@ -606,6 +693,24 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
>>               break;
>>       }
>>
>> +     switch (bfpt.dwords[BFPT_DWORD(16)] & BFPT_DWORD16_4B_ADDR_MODE_MASK)
>> {
> 
> I was wondering why this is encoded as single bits and not as an
> enumeration. To me it looks like it is intended to support

because I parse 2 bits and check if both the enter and the exit methods of
the 4b addr mode are specified.

> different methods at the same time. Thus I think there might be
> multiple bits set in each entry and exit mask at once. The spec
> lists all the entries as x_xxx1, x_xx1x, ..
> 
>> +     case BFPT_DWORD16_4B_ADDR_MODE_BRWR:
> .. then this will only match if exactly these two bits are set.
> 

these 2 bits are:
drivers/mtd/spi-nor/sfdp.h:#define BFPT_DWORD16_4B_ADDR_MODE_BRWR                       \
drivers/mtd/spi-nor/sfdp.h-     (BFPT_DWORD16_EN4B_BRWR | BFPT_DWORD16_EX4B_BRWR)

When both specified, I set the method.

Cheers,
ta

  parent reply	other threads:[~2022-04-14  9:25 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11 12:53 [PATCH v3 0/3] mtd: spi-nor: Parse BFPT to determine the 4-Byte Address Mode Tudor Ambarus
2022-04-11 12:53 ` [PATCH v3 1/3] mtd: spi-nor: Parse BFPT to determine the 4-Byte Address Mode methods Tudor Ambarus
2022-04-14  9:03   ` Michael Walle
2022-04-14  9:05     ` Michael Walle
2022-04-14  9:25     ` Tudor.Ambarus [this message]
2022-04-14  9:51       ` Michael Walle
2022-04-14 11:05         ` Tudor.Ambarus
2022-04-16 15:03           ` Michael Walle
2022-04-11 12:53 ` [PATCH v3 2/3] mtd: spi-nor: Update name and description of the set_4byte_addr_mode BFPT methods Tudor Ambarus
2022-04-14  9:10   ` Michael Walle
2022-04-11 12:53 ` [PATCH v3 3/3] mtd: spi-nor: Favor the BFPT-parsed set_4byte_addr_mode method Tudor Ambarus
2022-04-14  9:21   ` Michael Walle
2022-04-14  9:32     ` Tudor.Ambarus
2022-04-18  8:45       ` Pratyush Yadav

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