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From: Tom Zanussi <tom.zanussi@linux.intel.com>
To: Rex Zhang <rex.zhang@intel.com>
Cc: dave.jiang@intel.com, davem@davemloft.net,
	dmaengine@vger.kernel.org, fenghua.yu@intel.com,
	giovanni.cabiddu@intel.com, herbert@gondor.apana.org.au,
	james.guilford@intel.com, kanchana.p.sridhar@intel.com,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	tony.luck@intel.com, vinodh.gopal@intel.com, vkoul@kernel.org,
	wajdi.k.feghali@intel.com
Subject: Re: [PATCH v7 12/14] crypto: iaa - Add support for deflate-iaa compression algorithm
Date: Mon, 17 Jul 2023 16:35:39 -0500	[thread overview]
Message-ID: <79989c1537c66a90eca5339028ed447b3805e906.camel@linux.intel.com> (raw)
In-Reply-To: <20230717021203.3541437-1-rex.zhang@intel.com>

Hi Rex,

On Mon, 2023-07-17 at 10:12 +0800, Rex Zhang wrote:
> Hi, Tom,
> 

[snip]

> > +
> > +static int iaa_comp_acompress(struct acomp_req *req)
> > +{
> > +       struct iaa_compression_ctx *compression_ctx;
> > +       struct crypto_tfm *tfm = req->base.tfm;
> > +       dma_addr_t src_addr, dst_addr;
> > +       int nr_sgs, cpu, ret = 0;
> > +       struct iaa_wq *iaa_wq;
> > +       u32 compression_crc;
> > +       struct idxd_wq *wq;
> > +       struct device *dev;
> > +
> > +       compression_ctx = crypto_tfm_ctx(tfm);
> > +
> > +       if (!iaa_crypto_enabled) {
> > +               pr_debug("iaa_crypto disabled, not compressing\n");
> > +               return -ENODEV;
> > +       }
> > +
> > +       if (!req->src || !req->slen) {
> > +               pr_debug("invalid src, not compressing\n");
> > +               return -EINVAL;
> > +       }
> > +
> > +       cpu = get_cpu();
> > +       wq = wq_table_next_wq(cpu);
> > +       put_cpu();
> > +       if (!wq) {
> > +               pr_debug("no wq configured for cpu=%d\n", cpu);
> > +               return -ENODEV;
> > +       }
> > +
> > +       ret = iaa_wq_get(wq);
> > +       if (ret) {
> > +               pr_debug("no wq available for cpu=%d\n", cpu);
> > +               return -ENODEV;
> > +       }
> > +
> > +       iaa_wq = idxd_wq_get_private(wq);
> > +
> > +       if (!req->dst) {
> > +               gfp_t flags = req->flags & CRYPTO_TFM_REQ_MAY_SLEEP ? GFP_KERNEL : GFP_ATOMIC;
> > +               /* incompressible data will always be < 2 * slen */
> > +               req->dlen = 2 * req->slen;
> 2 * req->slen is an estimated size for dst buf. When slen is greater
> than 2048 bytes, dlen is greater than 4096 bytes.

Right, so you're saying that because sgl_alloc uses order 0, this could
result in nr_sgs > 1.  Could also just change this to sg_init_one like
all the other callers.

> > +               req->dst = sgl_alloc(req->dlen, flags, NULL);
> > +               if (!req->dst) {
> > +                       ret = -ENOMEM;
> > +                       goto out;
> > +               }
> > +       }
> > +
> > +       dev = &wq->idxd->pdev->dev;
> > +
> > +       nr_sgs = dma_map_sg(dev, req->src, sg_nents(req->src), DMA_TO_DEVICE);
> > +       if (nr_sgs <= 0 || nr_sgs > 1) {
> > +               dev_dbg(dev, "couldn't map src sg for iaa device %d,"
> > +                       " wq %d: ret=%d\n", iaa_wq->iaa_device->idxd->id,
> > +                       iaa_wq->wq->id, ret);
> > +               ret = -EIO;
> > +               goto out;
> > +       }
> > +       src_addr = sg_dma_address(req->src);
> > +       dev_dbg(dev, "dma_map_sg, src_addr %llx, nr_sgs %d, req->src %p,"
> > +               " req->slen %d, sg_dma_len(sg) %d\n", src_addr, nr_sgs,
> > +               req->src, req->slen, sg_dma_len(req->src));
> > +
> > +       nr_sgs = dma_map_sg(dev, req->dst, sg_nents(req->dst), DMA_FROM_DEVICE);
> > +       if (nr_sgs <= 0 || nr_sgs > 1) {
> when dlen is greater than 4096 bytes, nr_sgs maybe greater than 1,
> but the actual output size maybe less than 4096 bytes.
> In other words, the condition nr_sgs > 1 may block a case which could
> have been done.

Currently all existing callers use sg_init_one(), so nr_sgs is never >
1.  But yes, we should add code to be able to handle > 1, I agree.

Thanks,

Tom



  reply	other threads:[~2023-07-17 21:35 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-10 19:06 [PATCH v7 00/14] crypto: Add Intel Analytics Accelerator (IAA) crypto compression driver Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 01/14] dmaengine: idxd: add wq driver name support for accel-config user tool Tom Zanussi
2023-07-11 17:49   ` Fenghua Yu
2023-07-11 18:57     ` Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 02/14] dmaengine: idxd: add external module driver support for dsa_bus_type Tom Zanussi
2023-07-12 23:13   ` Yu, Fenghua
2023-07-10 19:06 ` [PATCH v7 03/14] dmaengine: idxd: Export drv_enable/disable and related functions Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 04/14] dmaengine: idxd: Export descriptor management functions Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 05/14] dmaengine: idxd: Export wq resource " Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 06/14] dmaengine: idxd: Add wq private data accessors Tom Zanussi
2023-07-12 23:12   ` Yu, Fenghua
2023-07-10 19:06 ` [PATCH v7 07/14] dmaengine: idxd: add callback support for iaa crypto Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 08/14] crypto: iaa - Add IAA Compression Accelerator Documentation Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 09/14] crypto: iaa - Add Intel IAA Compression Accelerator crypto driver core Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 10/14] crypto: iaa - Add per-cpu workqueue table with rebalancing Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 11/14] crypto: iaa - Add compression mode management along with fixed mode Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 12/14] crypto: iaa - Add support for deflate-iaa compression algorithm Tom Zanussi
2023-07-17  2:12   ` Rex Zhang
2023-07-17 21:35     ` Tom Zanussi [this message]
2023-07-22  1:23   ` Herbert Xu
2023-07-22 17:14     ` Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 13/14] crypto: iaa - Add irq support for the crypto async interface Tom Zanussi
2023-07-10 19:06 ` [PATCH v7 14/14] crypto: iaa - Add IAA Compression Accelerator stats Tom Zanussi

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