Re: [PATCH 07/33] dmaengine: at_hdmac: Fix at_lli struct definition

Vinod Koul
2022-10-19T16:38:48Z

On 20-08-22, 15:56, Tudor Ambarus wrote:
> From: Tudor Ambarus <tudor.ambarus@gmail.com>
>
> Those hardware registers are all of 32 bits, while dma_addr_t ca be of
> type u64 or u32 depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to
> comply with what the hardware expects.
>
> Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller")
> Signed-off-by: Tudor Ambarus <tudor.ambarus@gmail.com>
> Cc: stable@vger.kernel.org

Okay

> ---
> drivers/dma/at_hdmac.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
> index 91e53a590d5f..e89facf14fab 100644
> --- a/drivers/dma/at_hdmac.c
> +++ b/drivers/dma/at_hdmac.c
> @@ -187,13 +187,13 @@
> /* LLI == Linked List Item; aka DMA buffer descriptor */
> struct at_lli {
> /* values that are not changed by hardware */
> - dma_addr_t saddr;
> - dma_addr_t daddr;
> + u32 saddr;
> + u32 daddr;

I think you should add fixes first in the series and then do header
move, that way we can backport this and other fixes to stable kernels...

> /* value that may get written back: */
> - u32 ctrla;
> + u32 ctrla;
> /* more values that are not changed by hardware */
> - u32 ctrlb;
> - dma_addr_t dscr; /* chain to next lli */
> + u32 ctrlb;
> + u32 dscr; /* chain to next lli */
> };
>
> /**
> --
> 2.25.1

--
~Vinod