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From: George Kennedy <george.kennedy@oracle.com>
To: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: harshit.m.mogalapalli@oracle.com, peterz@infradead.org,
	mingo@redhat.com, acme@kernel.org, namhyung@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
	kan.liang@linux.intel.com, tglx@linutronix.de, bp@alien8.de,
	dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] perf/x86/amd: check event before enable to avoid GPF
Date: Tue, 4 Jun 2024 09:23:19 -0400	[thread overview]
Message-ID: <7b27a039-ddb9-4beb-a1b4-ba2b74a3043e@oracle.com> (raw)
In-Reply-To: <3ec1cb26-c889-45ab-b8cc-92f933a2b5d1@amd.com>



On 6/4/2024 9:16 AM, Ravi Bangoria wrote:
>>>>> Events can be deleted and the entry can be NULL.
>>>> Can you please also explain "how".
>>> It looks like x86_pmu_stop() is clearing the bit in active_mask and setting the events entry to NULL (and doing it in the correct order) for the same events index that amd_pmu_enable_all() is trying to enable.
>>>>> Check event for NULL in amd_pmu_enable_all() before enable to avoid a GPF.
>>>>> This appears to be an AMD only issue.
>>>>>
>>>>> Syzkaller reported a GPF in amd_pmu_enable_all.
>>>> Can you please provide a bug report link? Also, any reproducer?
>>> The Syzkaller reproducer can be found in this link:
>>> https://lore.kernel.org/netdev/CAMt6jhyec7-TSFpr3F+_ikjpu39WV3jnCBBGwpzpBrPx55w20g@mail.gmail.com/T/#u
>>>>> @@ -760,7 +760,8 @@ static void amd_pmu_enable_all(int added)
>>>>>            if (!test_bit(idx, cpuc->active_mask))
>>>>>                continue;
>>>>>    -        amd_pmu_enable_event(cpuc->events[idx]);
>>>>> +        if (cpuc->events[idx])
>>>>> +            amd_pmu_enable_event(cpuc->events[idx]);
>>>> What if cpuc->events[idx] becomes NULL after if (cpuc->events[idx]) but
>>>> before amd_pmu_enable_event(cpuc->events[idx])?
>>> Good question, but the crash has not reproduced with the proposed fix in hours of testing. It usually reproduces within minutes without the fix.
>> Also, a similar fix is done in __intel_pmu_enable_all() in arch/x86/events/intel/core.c except that a WARN_ON_ONCE is done as well.
>> See: https://elixir.bootlin.com/linux/v6.10-rc1/source/arch/x86/events/intel/core.c#L2256
> There are subtle differences between Intel and AMD pmu implementation.
> __intel_pmu_enable_all() enables all event with single WRMSR whereas
> amd_pmu_enable_all() loops over each PMC and enables it individually.
>
> The WARN_ON_ONCE() is important because it will warn about potential
> sw bug somewhere else.
We could add a similar WARN_ON_ONCE() to the proposed patch. Thanks, George
>
> Thanks,
> Ravi


  reply	other threads:[~2024-06-04 13:24 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-29 13:50 [PATCH] perf/x86/amd: check event before enable to avoid GPF George Kennedy
2024-05-30  3:37 ` Ravi Bangoria
2024-05-30 18:30   ` George Kennedy
2024-05-30 20:26     ` George Kennedy
2024-06-04 13:16       ` Ravi Bangoria
2024-06-04 13:23         ` George Kennedy [this message]
2024-06-04 13:40           ` Ravi Bangoria
2024-06-04 14:26             ` George Kennedy
2024-06-07 19:13             ` George Kennedy
2024-06-10 10:51               ` Ravi Bangoria
2024-06-24 16:18                 ` George Kennedy
2024-07-01 14:15                   ` George Kennedy
2024-07-02  4:03                   ` Ravi Bangoria
2024-07-02 11:38                     ` George Kennedy
2024-09-24 17:13                     ` George Kennedy
2024-09-26  4:05                       ` Ravi Bangoria
2024-06-03  4:39     ` Ravi Bangoria
2024-06-03 13:30       ` George Kennedy
2024-06-04 13:02         ` Ravi Bangoria
2024-06-04 13:00     ` Ravi Bangoria

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